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i.MX 6Dual/6Quad Applications Processor Data Sheet

NXP SemiconductorsData Sheet : Technical DataDocument Number: IMX8 MDQLQIECRev. 3, 04/2021 Ordering InformationSee Table 2 on page 6 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its MIMX8MQ6 CVAHZABMIMX8MD6 CVAHZAA MIMX8MD6 CVAHZABMIMX8MQ5 CVAHZAA MIMX8MQ5 CVAHZABP ackage InformationBare Die PackageFBGA 17 x 17 mm, mm 8M Dual / 8M QuadLite / 8M Quad introductionThe 8M Dual / 8M QuadLite / 8M Quad processorsrepresent NXP s latest market of connected streamingaudio/video devices, scanning/imaging devices, andvarious devices requiring high-performance, 8M Dual / 8M QuadLite / 8M Quad processors feature advanced implementation of a quad Arm Cortex -A53 core, which operates at speeds of up to GHz. A general purpose Cortex -M4 core Processor is for low-power processing. The DRAM controller supports 32-bit/16-bit LPDDR4, DDR4, and DDR3L memory.

One Gigabit Ethernet controller with support for EEE, Ethernet AVB, and IEEE 1588 Four Universal Asynchronous Receiver/Transmitter (UART) modules Four I2C modules Three SPI modules External memory interface 32/16-bit DRAM interface: LPDDR4-3200, DDR4-2400, DDR3L-1600 8-bit NAND-Flash eMMC 5.0 Flash SPI NOR Flash QuadSPI Flash with support …

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Transcription of i.MX 6Dual/6Quad Applications Processor Data Sheet

1 NXP SemiconductorsData Sheet : Technical DataDocument Number: IMX8 MDQLQIECRev. 3, 04/2021 Ordering InformationSee Table 2 on page 6 NXP reserves the right to change the production detail specifications as may be required to permit improvements in the design of its MIMX8MQ6 CVAHZABMIMX8MD6 CVAHZAA MIMX8MD6 CVAHZABMIMX8MQ5 CVAHZAA MIMX8MQ5 CVAHZABP ackage InformationBare Die PackageFBGA 17 x 17 mm, mm 8M Dual / 8M QuadLite / 8M Quad introductionThe 8M Dual / 8M QuadLite / 8M Quad processorsrepresent NXP s latest market of connected streamingaudio/video devices, scanning/imaging devices, andvarious devices requiring high-performance, 8M Dual / 8M QuadLite / 8M Quad processors feature advanced implementation of a quad Arm Cortex -A53 core, which operates at speeds of up to GHz. A general purpose Cortex -M4 core Processor is for low-power processing. The DRAM controller supports 32-bit/16-bit LPDDR4, DDR4, and DDR3L memory.

2 There are a number of other interfaces for connecting peripherals, such as WLAN, Bluetooth, GPS, displays, and camera sensors. The 8M Quad and 8M Dual processors have hardware acceleration for video playback up to 4K, and can drive the video outputs up to 60 fps. Although the 8M QuadLite Processor does not have hardware acceleration for video decode, it allows for video playback with software decoders if 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products1. 8M Dual / 8M QuadLite / 8M Quad introduction .. Block diagram .. Ordering information .. 62. Modules list .. Recommended connections for unused interfaces 123. Electrical characteristics .. Chip-level conditions .. Power supplies requirements and restrictions .. PLL electrical characteristics .. On-chip oscillators .. I/O DC parameters .. I/O AC parameters.

3 Output buffer impedance parameters .. System modules timing .. External peripheral interface parameters .. 404. Boot mode configuration .. Boot mode configuration pins .. Boot device interface allocation .. 775. Package information and contact assignments .. 17 x 17 mm package information .. DDR pin function list for 17 x 17 mm package .. 986. Revision history .. 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev. 3, 04/20212 NXP 8M Dual / 8M QuadLite / 8M Quad introductionTable 1. FeaturesSubsystemFeatureArm Cortex-A53 MPCore platformQuad symmetric Cortex-A53 processors: 32 KB L1 Instruction Cache 32 KB L1 data Cache Support L1 cache RAMs protection with parity/ECCS upport of 64-bit Armv8-A architecture: 1 MB unified L2 cache Support L2 cache RAMs protection with ECC Frequency of GHzArm Cortex-M4 core platform16 KB L1 Instruction Cache16 KB L1 data Cache256 KB tightly coupled memory (TCM)ConnectivityTwo PCI Express Gen2 interfacesTwo USB controllers with integrated PHY interfacesTwo Ultra Secure Digital Host Controller (uSDHC) interfacesOne gigabit ethernet controller with support for EEE, ethernet AVB, and IEEE 1588 Four Universal Asynchronous Receiver/Transmitter (UART) modulesFour I2C modulesThree SPI modulesExternal memory interface32/16-bit DRAM interface.

4 LPDDR4-3200, DDR4-2400, DDR3L-16008-bit NAND-FlasheMMC FlashSPI NOR FlashQuadSPI Flash with support for XIPGPIO and pin multiplexingGPIO modules with interrupt capabilityInput/output multiplexing controller (IOMUXC) to provide centralized pad controlOn-chip memoryBoot ROM (128 KB)On-chip RAM (128 KB + 32 KB)Power managementTemperature sensor with programmable trip pointsFlexible power domain partitioning with internal power switches to support efficient power 8M Dual / 8M QuadLite / 8M Quad 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev. 3, 04/2021 NXP Semiconductors3 MultimediaVideo Processing Unit: 4Kp60 main, and main 10 decoder 4Kp60 VP9 decoder 4Kp30 decoder 1080p60 MPEG-2, MPEG-4p2, VC-1, VP8, RV9, AVS, MJPEG, decoderGraphic Processing Unit: 4 shader 267 million triangles/sec Giga pixel/sec 32 GFLOPs 32-bit or 64 GFLOPs 16-bit Support OpenGL ES , , , , Open CL , and VulkanHDMI Display Interface: HDMI supporting one display: resolution up to 4096 x 2160 at 60 Hz, support HDCP and HDCP 20+ Audio interfaces 32-bit @ 384 kHz fs, with Time Division Multiplexing (TDM) support S/PDIF input and output Audio Return Channel (ARC) on HDMI Upscale HD graphics to 4K for display Downscale 4K video to HD for display Display Port Embedded Display PortMIPI-DSI Display Interface.

5 MIPI-DSI 4 channels supporting one display, resolution up to 1920 x 1080 at 60 Hz LCDIF display controller Output can be LCDIF output or DC display controller outputAudio: S/PDIF input and output Five synchronous audio interface (SAI) modules supporting I2S, AC97, TDM, and codec/DSP interfaces, including one SAI with 16 Tx and 16 Rx channels, one SAI with 8 Tx and 8 Rx channels, and three SAI with 2 Tx and 2 Rx channels One SAI for 8 Tx channels for HDMI output audio One S/PDIF input for HDMI ARC inputCamera inputs: Two MIPI-CSI2 camera inputs (4-lane each)SecurityResource Domain Controller (RDC) supports four domains and up to eight regionsArm TrustZone (TZ) architectureOn-chip RAM (OCRAM) secure region protection using OCRAM controllerHigh Assurance Boot (HAB)Cryptographic acceleration and assurance (CAAM) moduleSecure non-volatile storage (SNVS): Secure real-time clock (RTC)Secure JTAG controller (SJC)Table 1.

6 Features (continued) 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev. 3, 04/20214 NXP 8M Dual / 8M QuadLite / 8M Quad introductionNOTEThe actual feature set depends on the part numbers as described in Table 2. Functions such as display and camera interfaces, and connectivity interfaces, may not be enabled for specific part debugArm CoreSight debug and trace architectureTPIU to support off-chip real-time traceETF with 4 KB internal storage to provide trace bufferingUnified trace capability for Quad Cortex-A53 and Cortex-M4 CPUsCross Triggering Interface (CTI)Support for 5-pin (JTAG) debug interface1 Please contact the NXP sales and marketing team for order details on HDCP enable 1. Features (continued) 8M Dual / 8M QuadLite / 8M Quad 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev. 3, 04/2021 NXP diagramFigure 1 shows the functional modules in the 8M Dual / 8M QuadLite / 8M Quad Processor 1.

7 8M Dual / 8M QuadLite / 8M Quad system block diagramSystem ControlSmart DMA x2 Temperature SensorTimer x3 Secure JTAGW atchdog x3 Low Power, Security CPUC onnectivity and I/O1 GB ethernet (IEEE1588, EEE, and AVB)PWM x4 MultimediaUSB OTG x2S/PDIF Rx and Tx,MIPI DSI Display x1 HDMI outputExternal MemorySecurityTrustZoneDRM CiphersSecure ClockeFuse Key StorageRandom Number32 KB Secure RAMMain CPU PlatformQuad Cortex-A5332 KB I-cache32 KB D-cacheNEONFPU1 MB L2 CacheCortex-M416 KB I-cache16 KB D-cache256 KB TCM3D Graphics: 4 ShaderOpenGL/ES , CL , Vulkan4Kp60 Decoder and VP91080p60 MPEG-2, MPEG-4p2,VC-1, VP8, RV9, AVS,MJPEG, Decoder4Kp60 DisplayLPDDR4-32002x eMMC 5/SD 3 NAND CTL (BCH62)QuadSPI (XIP)Temp MonitorI2S/SAI x6 PCIe x2 (1-lane, each)UART x4, 5 MbpsI2C x4, SPI x3 MIPI CSI2 Capture x24Kp60 VP9 DDR4-2400 DDR3L-1600 HDCP 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev.

8 3, 04/20216 NXP 8M Dual / 8M QuadLite / 8M Quad informationTable 2 shows examples of orderable sample part numbers covered by this data Sheet . This table does not include all possible orderable part numbers. If your desired part number is not listed in the table, or you have questions about available parts, contact your NXP 2 describes the part number nomenclature so that the users can identify the characteristics of the specific part number. Contact an NXP representative for additional 2. Orderable part numbersFamilyPart numberPart differentiatorCortex-A CPU speed gradeQualification tierTemperature Tj ( C) 8M QuadMIMX8MQ6 CVAHZAAMIMX8MQ6 CVAHZABVPU decode, HDR10, GPU, 4x GHzIndustrial-40 to +10517 x 17 mm, mm pitch, 8M DualMIMX8MD6 CVAHZAAMIMX8MD6 CVAHZABVPU decode, HDR10, GPU, 2x GHzIndustrial-40 to +10517 x 17 mm, mm pitch, 8M QuadLiteMIMX8MQ5 CVAHZAAMIMX8MQ5 CVAHZABGPU, No VPU, 4x GHzIndustrial-40 to +10517 x 17 mm, mm pitch, 8M Dual / 8M QuadLite / 8M Quad 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev.

9 3, 04/2021 NXP Semiconductors7 Figure 2. Part number nomenclature 8M Dual / 8M QuadLite / 8M Quad processors*Please contact the NXP sales and marketing team for order details on HDCP enable parts. Part number series Arm core basedData Sheet Temperature Core frequency Arm AxxPart differentiator Silicon revisionFusing optionsQualification levelPackage type all ROHSMIMX8MQ@+VA$$%APart differentiator @VPU decode + HDR10, GPU6 GPU, No VPU (QuadLite)5 Temperature Tj +Consumer: 0 to +95oCDIndustrial: -40 to 105oCCFrequency $$ GHzHZPackage typeROHS17 x 17 mm, mm pitch, FCBGA bare die VAQualification levelSamplesPMass ProductionMSpecialSPart number seriesDescriptionIMX8 MQQuad coreIMX8 MDDual coreSilicon RevARev. NXP programmedCDolby Digital Plus (DD+)INote 1: Part number with Dolby IP require verification of the Dolby License prior to quoting and prior to shipment. Contact Commercial Marketing. 8M Dual / 8M QuadLite / 8M Quad Applications Processors data Sheet for Industrial Products, Rev.

10 3, 04/20218 NXP SemiconductorsModules list2 Modules listThe 8M Dual / 8M QuadLite / 8M Quad processors contain a variety of digital and analog modules. Table 3 describes these modules in alphabetical 3. 8M Dual / 8M QuadLite / 8M Quad modules listBlock mnemonicBlock nameBrief descriptionAPBH-DMANAND Flash and BCH ECC DMA ControllerDMA controller used for GPMI2 PlatformThe Arm Core Platform includes a quad Cortex-A53 core and a Cortex-M4 core. The Cortex-A53 core includes associated sub-blocks, such as the Level 2 Cache Controller, Snoop Control Unit (SCU), General Interrupt Controller (GIC), private timers, watchdog, and CoreSight debug modules. The Cortex-M4 core is used as a customer ECC ProcessorThe BCH module provides up to 62-bit ECC encryption/decryption for NAND Flash controller (GPMI)CAAMC ryptographic accelerator and assurance moduleCAAM is a cryptographic accelerator and assurance module . CAAM implements several encryption and hashing functions, a run-time integrity checker, entropy source generator, and a Pseudo Random Number Generator (PRNG).


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