IIS2DH - st.com

1 This is information on a product in full production. April 2015 DocID027668 Rev 21/49 IIS2 DHUltra-low-power high-performance 3-axis accelerometer with digital output for industrial applicationsDatasheet - production dataFeatures Wide supply voltage, V to V Independent IOs supply ( V) and supply voltage compatible Ultra-low power consumption down to 2 A 2g/ 4g/ 8g/ 16g selectable full scales I2C/SPI digital output interface 3 operating modes: low-power, normal, high-resolution mode 2 independent programmable interrupt generators for free-fall and motion detection 6D/4D orientation detection Motion detection & free-fall detection Sleep-to-wake and return-to-sleep functions Embedded FIFO Embedded self-test Embedded temperature sensor ECOPACK , RoHS and Green compliantApplications Robotics Anti-tampering devices Vibration monitoring Tilt/inclination measurements Impact recognition and logging Industrial tools and factory equipment Motion-activated functionsDescriptionThe IIS2DH is an ultra-low-power high-performance three-axis linear accelerometer with digital I2C/SPI serial interface standard output.

2 The IIS2DH has user-selectable full scales of 2g/ 4g/ 8g/ 16g and is capable of measuring accelerations with output data rates from 1 Hz to device may be configured to generate interrupt signals by two independent inertial wake-up/free-fall events as well as by the position of the device self-test capability allows the user to check the functionality of the sensor in the final IIS2DH is available in a small thin plastic land grid array package (LGA) and is guaranteed to operate over an extended temperature range from -40 C to +85 ( mm) Table 1. Device summaryOrder codeTemperature range [ C]PackagePackagingIIS2 DHTR-40 to +85 LGA-12 Tape and Rev 2 Contents1 Block diagram and pin description .. diagram .. description .. 82 Mechanical and electrical specifications .. characteristics .. sensor characteristics .. characteristics.

3 Interface characteristics .. - serial peripheral interface .. - inter-IC control interface .. maximum ratings .. and functionality .. 16 Terminology .. level .. 16 Functionality .. , normal mode, low-power mode .. / 4D orientation detection .. Sleep-to-wake and Return-to-sleep .. element .. interface .. calibration .. sensor .. 193 Application hints .. information .. 204 Digital main blocks .. mode .. 21 DocID027668 Rev 23 mode .. mode .. mode .. data from FIFO .. 225 Digital interfaces .. serial interface .. operation .. bus interface .. read .. write .. read in 3-wire mode .. 296 Register mapping .. 307 Register description .. (07h) .. (0Ch), OUT_TEMP_H (0Dh) .. (0Eh) .. (0Fh) .. (1Fh) .. (20h) .. (21h) .. (22h).

4 (23h) .. (24h) .. (25h) .. (26h) .. (27h) .. (28h), OUT_X_H (29h) .. (2Ah), OUT_Y_H (2Bh) .. (2Ch), OUT_Z_H (2Dh) .. (2Eh) .. (2Fh) .. (30h) .. 39 ContentsIIS2DH4/49 DocID027668 Rev (31h) .. (32h) .. (33h) .. (34h) .. (35h) .. (36h) .. (37h) .. (38h) .. (39h) .. (3Ah) .. (3Bh) .. (3Ch) .. (3Dh) .. (3Eh) .. (3Fh) .. 468 Package information .. package information .. 479 Revision history .. 48 DocID027668 Rev 25/49 IIS2 DHList of tables49 List of tablesTable summary .. 1 Table description .. 9 Table characteristics .. 10 Table sensor characteristics .. 11 Table characteristics .. 12 Table slave timing values.. 13 Table slave timing values .. 14 Table maximum ratings .. 15 Table mode selection .. 16 Table time for operating mode transition.

5 17 Table consumption of operating modes.. 17 Table interface pin description .. 23 Table terminology ..23 Table +read/write patterns.. 24 Table when master is writing one byte to slave .. 24 Table when master is writing multiple bytes to slave .. 25 Table when master is receiving (reading) one byte of data from slave .. 25 Table when master is receiving (reading) multiple bytes of data from slave .. 25 Table address map.. 30 Table register .. 32 Table description .. 32 Table register .. 32 Table register .. 32 Table register ..32 Table description .. 32 Table register .. 33 Table description .. 33 Table rate configuration .. 33 Table register .. 34 Table description .. 34 Table filter mode configuration ..34 Table mode - high-pass filter cutoff frequency .. 34 Table register .. 35 Table description.

6 35 Table register .. 35 Table description .. 35 Table mode configuration .. 36 Table register .. 36 Table description .. 36 Table register .. 36 Table description .. 36 Table register .. 37 Table description .. 37 Table register .. 37 Table description ..37 Table register ..38 Table description .. 38 Table mode configuration .. 38 List of tablesIIS2DH6/49 DocID027668 Rev 2 Table register ..38 Table description ..39 Table register .. 39 Table description .. 39 Table mode .. 39 Table register .. 40 Table description .. 40 Table register .. 40 Table description.. 41 Table register ..41 Table description ..41 Table register .. 41 Table description .. 41 Table mode .. 42 Table register .. 42 Table description .. 42 Table register .. 43 Table description.. 43 Table register.

7 43 Table description ..43 Table register.. 43 Table description .. 44 Table register.. 44 Table description .. 44 Table register .. 45 Table description .. 45 Table register .. 45 Table description .. 45 Table register .. 45 Table description ..45 Table register.. 45 Table description ..45 Table register.. 46 Table description .. 46 Table register .. 46 Table description.. 46 Table revision history.. 48 DocID027668 Rev 27/49 IIS2 DHList of figures49 List of figuresFigure diagram .. 8 Figure connections .. 8 Figure slave timing diagram .. 13 Figure slave timing diagram .. 14 Figure electrical connections .. 20 Figure and write protocol .. 26 Figure read protocol .. 27 Figure byte SPI read protocol (2-byte example) .. 27 Figure write protocol .. 28 Figure byte SPI write protocol (2-byte example).

8 28 Figure read protocol in 3-wire mode .. 29 Figure package outline and mechanical data .. 47 Block diagram and pin descriptionIIS2DH8/49 DocID027668 Rev 21 Block diagram and pin Block diagramFigure 1. Block Pin descriptionFigure 2. Pin connections&+$5*($03/,),(5< = < = D; ; , &63,&66&/ 63&6'$ 6', 6'26'2 6$ &21752/ /2*,& ,17(55837 *(1 ,17 &/2&.75,00,1*&,5&8,767 HPSHUDWXUH6(/) 7(67&21752/ $ ' &219(57(5,17 08; /HYHO),)2/2*,&6 HQVRU$0 9 7239,(: ',5(&7,212)7+('(7(&7$%/($&&(/(5$7,216< ;=*1'6&/ 63&6'$ 6', 6'2&66'2 6$ *1'5(6,17 9 GGB,2 %277209,(: *1' ,17 9GG DocID027668 Rev 29/49 IIS2 DHBlock diagram and pin description49 Table 2. Pin description Pin#NameFunction1 SCLSPCI2C serial clock (SCL)SPI serial port clock (SPC)2 CSSPI enableI2C/SPI mode selection:1: SPI idle mode / I2C communication enabled 0: SPI communication mode / I2C disabled3 SDOSA0 SPI serial data output (SDO)I2C less significant bit of the device address (SA0)4 SDASDISDOI2C serial data (SDA)SPI serial data input (SDI)3-wire interface serial data output (SDO)5 ResConnect to GND6 GND0 V supply7 GND0 V supply8 GND0 V supply9 VddPower supply10 Vdd_IOPower supply for I/O pins11 INT2 Interrupt pin 212 INT1 Interrupt pin 1 Mechanical and electrical specificationsIIS2DH10/49 DocID027668 Rev 22 Mechanical and electrical Mechanical characteristics@ Vdd = V, T = 25 C unless otherwise noted(a)a.)))))))))))))

9 The product is factory calibrated at V. The operational power supply range is from V to V. Table 3. Mechanical characteristics SymbolParameterTest conditionsMin.(1)Typ.(2)Max.(1)UnitFSMea surement range(3)FS bits set to 00 bits set to 01 bits set to 10 bits set to 11 FS bits set to 00; Normal bits set to 00; High-resolution bits set to 00; Low-power bits set to 01;Normal bits set to 01;High-resolution bits set to 01;Low-power bits set to 10;Normal bits set to 10;High-resolution bits set to 10;Low-power bits set to 11;Normal bits set to 11;High-resolution bits set to 11;Low-power change vs. temperatureFS bits set to 00 CTyOffTypical zero-g level offset accuracy(4)FS bits set to 00-90 40+90mgDocID027668 Rev 211/49 IIS2 DHMechanical and electrical Temperature sensor characteristics@ Vdd = V, T = 25 C unless otherwise noted(b)TCOffZero-g level change vs.

10 TemperatureMax delta from 25 C CVstSelf-test output change(5) (6) (7)FS bits set to 00X-axis; Normal mode17360 LSbFS bits set to 00Y-axis; Normal mode17360 LSbFS bits set to 00Z-axis; Normal mode17360 LSbTo pOperating temperature range-40+85 C1. Minimum and maximum values are based on characterization data and are not guaranteed2. Typical specifications are not Verified by wafer level test and measurement of initial offset and Typical zero-g level offset value after factory calibration test at socket The sign of Self-test output change is defined by the ST bit in CTRL_REG4 (23h), for all Self-test output change is defined as the absolute value of:OUTPUT[LSb](Self test enabled) - OUTPUT[LSb](Self test disabled). 1 LSb = 4 mg at 10-bit representation, 2 g full scale7. After enabling the ST bit, correct data is obtained after two samples (low-power mode / normal mode) or after eight samples (high-resolution mode).