IS2062 64 Bluetooth® 4.2 Stereo Audio SoC

1 IS2062 /64 Bluetooth Stereo Audio SoCIntroductionThe IS2062 /64 products are part of the Bluetooth Dual Mode family of Stereo Audio System on Chip(SoC) devices. Flash-based devices: The IS2062GM and IS2064GM SoCs are offered in LGA packages and contain in-packageFlash, which allows for firmware updates. ROM-based devices: The IS2064S and IS2064B natively supports Stereo Mode functionality in ROM. This allowsfor Audio playback on two devices. Some Bluetooth parameters can be customized andstored in an internal EEPROM. These products are offered in QFN and BGA Qualified for Bluetooth specification Bluetooth Audio profiles: A2DP AVRCP HFP HSP SPP Bluetooth Low Energy (BLE): Generic access service Device information service Proprietary services for data communication Apple Notification Center Service (ANCS) Supports 16 kHz High Definition (HD) voice Audio interfaces: I2S digital output (IS2064GM and IS2064S/B) Analog output Auxiliary input Microphone input Supports firmware upgrade (IS2062GM/64GM) Integrated battery charger (up to 350 mA) 2017 Microchip Technology Inc.

2 DatasheetDS60001409D-page 1 Baseband Features 16 MHz main clock input Built-in Flash memory for programing (8 Mbit) (IS2062GM/64GM) Built-in EEPROM Connects simultaneously to two hosts over HFP/A2DP and SPP/BLE Adaptive Frequency Hopping (AFH) Audio Codec Sub-band Coding (SBC) decoding and Advanced Audio Coding (AAC) decoding (IS2062GM/64GM) 20-bit Digital-to-analog Converter (DAC) with 98 dB SNR 16-bit Analog-to-digital Converter (ADC) with 92 dB SNR Supports up to 24-bit, 96 kHz I2S digital Audio (IS2064GM and IS2064S/B)RF Features Transmit output power: +2 dBm Receive sensitivity: -90 dBm (2 Mbps Enhanced Data Rate (EDR)) Combined Tx/Rx RF terminal simplifies external matching and reduces external antenna switches Tx/Rx RF switch for Class 2 or Class 3 applications Integrated synthesizer requires no external voltage-controlled oscillator (VCO), varactor diode, andresonator or loop filter Crystal oscillator with built-in digital trimming compensates for temperature or process variationsDSP Audio Processing Includes a 32-bit DSP core Synchronous Connection-Oriented (SCO) channel operation 8/16 kHz noise suppression 8/16 kHz acoustic echo cancellation Modified Sub-Band Coding (MSBC) decoder for wide band speech Built-in High Definition Clean Audio (HCA) algorithms for both narrow band and wideband speechprocessing Packet Loss Concealment (PLC)

3 Built-in Audio effect algorithms to enhance Audio streaming Serial Copy Management System (SCMS-T) content protectionPackage DetailsTable 1. PACKAGE DETAILSP arameterIS2062 GMIS2064 GMIS2064 SIS2064 BPackage typeLGALGAQFNBGAPin count56686861 IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 2 ParameterIS2062 GMIS2064 GMIS2064 SIS2064 BContact/Lead : All dimensions are in millimeters (mm) unless UART interface for host MCU communication Full-speed USB interface (IS2064GM and IS2064S) Built-in lithium-ion (Li-Ion) and lithium-polymer (Li-Po) battery charger (up to 350 mA) Integrated and 3V configurable voltage regulators Built-in ADC for battery monitoring, voltage sensor and charger thermal protection Built-in under voltage protection (UVP) LED drivers: 2 (IS2062GM and IS2064B) and 3 (IS2064GM and IS2064S)Operating Condition Operating voltage : to Operating temperature.

4 -20 C to +70 CApplications Headsets and headphones (IS2062GM and IS2064B) Portable speakers Earbuds and neckbands (IS2064B) IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 3 Table of 1 Baseband Audio 3 Operating Signal Speaker Frequency Hopping (AFH).. Management a Dropout 29 IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page Voltage MCU and Firmware Purpose I/O Mode Placement Marking Profile and Storage Reflow Revision 84 The Microchip Web Change Notification 85 Customer Devices Code Protection 86 Quality Management System Certified by 86 Worldwide Sales and IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 51. Device OverviewThe IS2062 /64 SoC integrates: Bluetooth dual-mode radio transceiver Power Management Unit (PMU) Microcontroller (MCU) Audio codec Crystal oscillator 32-bit DSP Flash (IS2062GM/64GM) EEPROMThe IS2062 /64 SoC is configured using an UI : The UI tool is a Windows based configuration utility tool, which is available for download from theMicrochip website at and following figure illustrates the block diagram of the IS2062 /64 1-1.

5 BLOCK DIAGRAM OF IS2062 /64 SOC IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 6 Note: 1. Key FeaturesThe following table provides the key features of the IS2062 /64 1-1. KEY FEATURESF eatureIS2062 GMIS2064 GMIS2064 SIS2064 BApplicationHeadset/SpeakerSpeakerSpeake rHeadsetFlash/ROMF lashFlashROMROMS tereo modeYes/ProgrammableYes/ProgrammableYesY esPackageLGALGAQFNBGAPin/Ball count56686861 Dimensions (mm)7x78x88x85x5 Audio DAC output2-channel2-channel2-channel2-chann elDAC (single-ended) SNR (dB)-98-98-98-98 DAC (capless) SNR at (dB)-96-96-96-96 ADC SNR at (dB)-92-92-92-92I2S digital outputNoYesYesYesAnalog outputYesYesYesYesAnalog Auxiliary-InputYesYesYesYesMono microphone2112 External Audio amplifierinterfaceYesYesYesYesUARTYesYes YesYesFull-speed USB driver2332 Integrated DC-DC step-down regulator1111 Integrated LDO regulator2222DC 5V adaptor inputYesYesYesYes IS2062 /64 2017 Microchip Technology Inc.

6 DatasheetDS60001409D-page 7 FeatureIS2062 GMIS2064 GMIS2064 SIS2064 BBattery charger (350 mAmaximum)YesYesYesYesADC for charger thermalprotectionYesYesYesYesUnder Voltage Protection(UVP)YesYesYesYesGPIO10151510 EEPROM128K128K256K128 KMultitoneYesYesYesYesDSP functions (audioplayback and voice call)YesYesYesYesBLEYesYesYesYesBluetoot h Pin DetailsThe following figure illustrates the pin diagram of the IS2062GM. IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 8 Figure 1-2. IS2062GM PIN DIAGRAMThe following figure illustrates the pin diagram of the IS2064GM. IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 9 Figure 1-3. IS2064GM PIN DIAGRAMThe following figure illustrates the pin diagram of the IS2064S. IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 10 Figure 1-4.

7 IS2064S PIN DIAGRAMThe following figure illustrates the pin diagram of the IS2064B. IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 11 Figure 1-5. IS2064B PIN DIAGRAMA1 MIC_N2A1 MIC_P2B1 MIC_N1C1 MIC_P1D1 AIRE1 AILF1 VDDAA2 VDD_IOB2 MIC_BIASC2 VDD_CORED2P1_3E2 RST_NF2 AOHPLA3 VCOMB3 AOHPMA4DT0B4 GNDE4 AOHPRA5 SCLK0B5P2_0D5 GNDE5 GNDF5 GNDA6 RFS0B6 GNDE6RF_RTXA7DR0B7 VCC_RFA8P0_5B8 ULPC_VSUSC8 VBGD8P3_0E8P2_7F8XO_PA9XO_NB9 RFLDO_OC9 PMIC_IND9 CLDO_OE9 LED1F9 ABCDEFPIN 1123456789P0_1G1P2_4G2P0_2G8 LED2G9 GCODEC_VOH1P0_4H2P1_5H3 HCI_RXDH4 HCI_TXDH5 AMB_DETH6P0_0H7P0_3H8 MFBH9 HLDO31_VINJ1 LDO31_VOJ2 ADAP_INJ3 BAT_INJ4 SAR_VDDJ5 SYS_PWRJ6BK_VDDJ7BK_LXJ8BK_OJ9 JThe following table provides the pin description of the IS2062GM, IS2064GM, IS2064S and : The conventions used in the below table are indicated as follows: I = Input pin O = Output pin I/O = Input/Output pin P = Power pin IS2062 /64 2017 Microchip Technology Inc.

8 DatasheetDS60001409D-page 12 Table 1-2. PIN DESCRIPTIONIS2062 GMPin NoIS2064 GMandIS2064 SPin NoIS2064 BBall NoPin TypePin NameDescription531 PVDDAOP ower supply ( to )dedicated to codec output amplifiers;connect to CODEC_VO pin542A4 OAOHPMH eadphone common mode output/sense input553A3 OAOHPLLeft channel, analog headphoneoutput564A2 PVDDAA nalog reference voltage. Do notconnect, for internal use only15B3 PVCOMI nternal biasing voltage for codec,connect a F capacitor to ground46C1 IMIC_N1 MIC1 mono differential analognegative input57D1 IMIC_P1 MIC1 mono differential analogpositive input2 A1 IMIC_N2 MIC2 mono differential analognegative input3 B1 IMIC_P2 MIC2 mono differential analogpositive input68C2 PMIC_BIASE lectric microphone biasing voltage79E1 IAIRR ight channel, single-ended analoginput810F1 IAILLeft channel, single-ended analoginput911D2 PVDD_CORECore power input; connect toCLDO_O pin; connect to GNDthrough a 1 F (X5R/X7R) capacitor1012 OP1_2I2C SCL (Internal EEPROM clock),do not connect1113E2I/OP1_3I2C SDA (Internal EEPROM data)requires external kOhm pull-upresistor1214F2 IRST_NSystem Reset (active-low)1315B2 PVDD_IOI/O power supply input ( ).

9 Connect to LDO31_VO; IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 13IS2062 GMPin NoIS2064 GMandIS2064 SPin NoIS2064 BBall NoPin TypePin NameDescriptionconnect to GND through a 1 F(X5R/X7R) capacitor1416G1I/OP0_1 Configurable control or indication pin(Internally pulled-up, if configured asan input) FWD key when Class 2 RF(default), active-low Class 1 Tx control signal forexternal RF Tx/Rx switch,active-high1517G2I/OP2_4 For IS2062GM/64GM (Flash variant):External address bus negative,System configuration pin along withthe P2_0 and EAN pins can be usedto set the SoC in any one of thefollowing three modes: Application mode (for normaloperation) Test mode (to changeEEPROM values), and Write Flash mode (to load anew firmware into the SoC),see Table 6-1 For IS2064S/B (ROM variant).

10 Donot connect this pin1618H2I/OP0_4 Configurable control or indication pin(Internally pulled-up, if configured asan input) Out_Ind_11719H3IP1_5 Configurable control or indication pin(Internally pulled-up, if configured asan input) Slide switch detector, active-high Out_Ind_1 Master/Slave mode control1820H4 OHCI_RXDHCI UART data input1921H5 IHCI_TXDHCI UART data output2022H1 PCODEC_VOLDO output for codec power IS2062 /64 2017 Microchip Technology Inc. DatasheetDS60001409D-page 14IS2062 GMPin NoIS2064 GMandIS2064 SPin NoIS2064 BBall NoPin TypePin NameDescription2123J1 PLDO31_VINLDO input, connect to SYS_PWR2224J2 ILDO31_VO3V LDO output for VDD_IO power,do not calibrate2325J3 PADAP_IN5V power adapter input, used tocharge the battery in case of Li-Ionbattery power applications2426J4 PBAT_INPower Supply range: to Sourcecan either be a Li-Ion battery or anyother power rail on the host board2527H6 PAMB_DETA nalog input for ambient temperaturedetection2628J5 PSAR_VDDSAR input; connect to BK_Opin2729J6 PSYS_PWRS ystem power output derived fromthe ADAP_IN or BAT_IN.