ISD Cortex™-M0 ChipCorder ISD9160 Technical …

1 ISD9160 Technical reference manual Publication Release Date: Mar 30, 2016 - 1 - Revision ISD Cortex -M0 ChipCorder ISD9160 Technical reference manual The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. Nuvoton is providing this document only for reference purposes of ISD ChipCorder microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions.

2 All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation. ISD9160 Technical reference manual Release Date: Mar 30, 2016 - 2 - Revision Table of Contents- TABLE OF CONTENTS- .. 2 1 GENERAL DESCRIPTION .. 6 2 FEATURES .. 7 3 PART INFORMATION AND PIN CONFIGURATION .. 10 Pin Configuration .. 10 ISD9160 LQFP 48 pin .. 10 Pin Description .. 10 4 BLOCK DIAGRAM .. 15 5 FUNCTIONAL 16 ARM Cortex -M0 core .. 16 System Manager.

3 17 Overview .. 17 System Reset .. 17 System Power Distribution .. 18 System Memory 19 System Manager Control Registers .. 21 System Timer (SysTick) .. 39 Nested Vectored Interrupt Controller (NVIC) .. 43 System Control Registers .. 83 Clock Controller and Power Management Unit (PMU) .. 90 Clock Generator .. 90 System Clock & SysTick Clock .. 91 Peripheral Clocks .. 92 Power Management .. 92 Clock Control Register Map .. 93 Clock Control Register Description .. 95 General Purpose I/O.

4 111 Overview and Features .. 111 GPIO I/O Modes .. 111 GPIO Control Register Map .. 113 GPIO Control Register Description .. 114 Brownout Detection and Temperature Alarm .. 124 Brownout and Temperature Alarm Register Map .. 124 I2C Serial Interface Controller (Master/Slave) .. 129 Introduction .. 129 I2C Protocol Registers .. 134 Register Mapping .. 137 Register Description .. 138 Modes of Operation .. 145 Data Transfer Flow in Five Operating Modes .. 146 PWM Generator and Capture Timer.

5 152 Introduction .. 152 Features .. 153 PWM Generator Architecture .. 154 PWM-Timer Operation .. 154 ISD9160 Technical reference manual Release Date: Mar 30, 2016 - 3 - Revision PWM Double Buffering, Auto-reload and One-shot Operation .. 156 Modulate Duty Cycle .. 156 Dead-Zone Generator .. 157 Capture Timer Operation .. 158 PWM-Timer Interrupt Architecture .. 159 PWM-Timer Initialization Procedure .. 159 PWM-Timer Stop Procedure .. 159 Capture Start Procedure .. 160 Register Map .. 161 Register Description.

6 162 Real Time Clock (RTC) .. 177 Overview .. 177 RTC Features .. 177 RTC Block Diagram .. 178 RTC Function Description .. 179 Register Map .. 181 Register Description .. 182 Serial Peripheral Interface (SPI) Controller .. 195 Overview .. 195 Features .. 195 SPI Block Diagram .. 195 SPI Function Descriptions .. 196 SPI Timing Diagram .. 204 SPI Configuration Examples .. 207 SPI Serial Interface Control Register Map .. 209 SPI Control Register Description .. 210 Timer Controller .. 219 General Timer Controller.

7 219 Features .. 219 Timer Controller Block 220 Timer Controller Register Map .. 221 Watchdog Timer .. 227 Watchdog Timer Control Registers Map .. 229 UART Interface Controller .. 232 Overview .. 232 Features of UART controller .. 234 Block Diagram .. 235 IrDA Mode .. 237 LIN (Local Interconnection Network) mode .. 239 UART Interface Control Register Map .. 240 UART Interface Control Register Description .. 241 I2S Audio PCM Controller .. 262 Overview .. 262 Features .. 262 I2S Block Diagram.

8 263 I2S Operation .. 264 FIFO operation .. 265 I2S Control Register Map .. 266 I2S Control Register Description .. 267 ISD9160 Technical reference manual Release Date: Mar 30, 2016 - 4 - Revision Cyclic Redundancy Check (CRC) Controller .. 278 Overview and Features .. 278 Operation .. 278 Example .. 278 CRC Controller Register Map .. 279 CRC Control Register Description .. 280 PDMA Controller .. 283 Overview .. 283 Features .. 283 Block Diagram .. 283 Function Description .. 284 PDMA Controller Register Map.

9 285 PDMA Control Register Description .. 287 6 FLASH MEMORY CONTROLLER (FMC) .. 305 Overview .. 305 Features .. 305 Flash Memory Controller Block Diagram .. 306 Flash Memory Organization .. 307 Boot Selection .. 308 Data Flash (DATAF) .. 308 User Configuration (CONFIG) .. 309 In-System Programming (ISP) .. 311 ISP Procedure .. 311 Flash Control Register Map .. 314 Flash Control Register Description .. 315 7 ANALOG SIGNAL PATH BLOCKS .. 322 Audio Analog-to-Digital Converter (ADC).. 322 Functional Description.

10 322 Features .. 322 Block Diagram .. 322 Operation .. 323 ADC Register 325 ADC Register Description .. 326 Audio Class D Speaker Driver (DPWM) .. 334 Functional Description .. 334 Features .. 334 Block Diagram .. 334 Operation .. 334 DPWM Register Map .. 336 DPWM Register Description .. 337 Analog Comparator .. 342 Functional Description .. 342 Features .. 342 Block Diagram .. 342 Operational Procedure .. 343 Setup Procedure .. 343 ISD9160 Technical reference manual Release Date: Mar 30, 2016 - 5 - Revision Register Map.