LCDTFT display controller LTDC on STM32 MCUs ...

1 July 2020AN4861 Rev 31/961AN4861 Application noteLCD-TFT display controller (LTDC) on STM32 MCUs IntroductionThe evolution of the mobile, industrial and consumer applications leads to a stronger need of graphical user interfaces (GUIs) and to an increase in the required hardware resources. These applications require higher quality graphics, more hardware and software resources (like memory for graphical primitives or framebuffer) and higher processing performances. To respond to this increasing demand, microprocessor units are often used, which leads to a higher costs and to more complex designs with longer time to market. To face these requirements, the STM32 microcontrollers (MCUs) offer a large graphical portfolio. Thanks to their embedded LCD-TFT display controller (LTDC), the STM32 MCUs allow high-resolution display panels to be directly driven, without any CPU intervention.

2 In addition, the LTDC can access autonomously to internal memories or external memories to fetch pixel application note describes the LCD-TFT display controller of the STM32 MCUs listed in the table below, and demonstrates how to use and configure the LTDC peripheral. It also highlights some hardware, software and architectural considerations to obtain the best graphical STM32 products are named as follows in this application note: STM32F4x9 STM32F7x6/7/8/9 STM32H7A3/B3 and STM32H7B0 STM32H742/43/45/47/53/55/57 and STM32H750 STM32L4+ or STM32L4R/S and STM32L4P/Q Table 1. Applicable productsTypeProductsMCUsSTM32F429/439 and STM32F469/479 linesSTM32F7x6, STM32F7x7, STM32F7x8 and STM32F7x9 linesSTM32H7A3/B3, STM32H742, STM32H743/753, STM32H745/755, STM32H747/757 linesSTM32H7B0, STM32H750 Value linesSTM32L4+ Rev 3 Contents1 display and graphics overview.

3 Graphics concepts .. interface standards .. interfaces supported by STM32 MCUs .. 132 Overview of LTDC controller and STM32 MCUs graphical portfolio . display controller on STM32 MCUs .. and graphic portfolio across STM32 MCUs .. in a smart architecture .. of using an STM32 LTDC controller .. 193 LCD-TFT (LTDC) display controller description .. description .. clock domains .. reset .. timings and hardware interface .. pins and signal interface .. programmable timings for different display sizes .. programmable LTDC layers .. window position and size configuration .. layer: color framebuffer .. modes .. 314 Creating a graphical application with LTDC .. graphical application requirements .. the display size and color depth compatibility with the hardware configuration.

4 Memory size requirements and location .. display compatibility considering the memory bandwidth requirements .. the compatibility of the display panel interface with the LTDC .. package selection guide .. 44AN4861 Rev 33 synchronization with DMA2D and CPU .. usage .. and DMA2D/CPU synchronization .. performance optimization .. allocation .. the LTDC framebuffer fetching from external memories (SDRAM or SRAM) .. the LTDC framebuffer fetching from SDRAM .. content update during balnking period .. recommendations for Cortex-M7 (STM32F7/H7) .. FMC bank1 if not used .. the memory protection unit (MPU) .. peripheral configuration .. panel connection .. clocks and timings configuration .. layers configuration .. panel configuration .. graphic primitives .. images to C files.

5 Considerations .. 635 Saving power consumption .. 646 LTDC application examples .. examples and resources requirements .. MCU .. with external memory .. : creating a basic graphical application .. description .. to check if a specific display size matches the hardware configuration .. GPIOs configuration .. peripheral configuration .. an image from the internal Flash .. SDRAM configuration .. and cache configuration .. boards with LCD-TFT panel .. 91 ContentsAN48614/96AN4861 Rev 37 Supported display panels .. 928 Frequently asked questions .. 939 Conclusion .. 9410 Revision history .. 95AN4861 Rev 35/96AN4861 List of tables5 List of tablesTable products .. 1 Table interfaces supported by STM32 MCUs .. 13 Table MCUs embedding an LTDC and their available graphic portfolio.

6 15 Table of using STM32 MCUs LTDC controller .. 19 Table interface output signals .. 21 Table timing registers .. 23 Table interrupts summary.. 30 Table peripheral state versus STM32 low-power modes .. 31 Table size for different screen resolutions .. 33 Table maximal supported pixel clock .. 39 Table maximal supported pixel clock .. 39 Table 12. STM32H742/43/45/47/53/55/57 and STM32H750 maximal supported pixel clock .. 40 Table and STM32H7B0 maximal supported pixel clock .. 41 Table + maximal supported pixel clock .. 41 Table maximal supported pixel clock .. 42 Table of supported display resolutions in specific STM32 hardware configurations .. 43 Table packages with LTDC peripheral versus RGB interface availability .. 45 Table timings extracted from ROCKTECH RK043FN48H datasheet .. 60 Table LTDC timing registers.

7 61 Table of graphic implantations with STM32 in different hardware configurations .. 67 Table reference boards embedding LTDC and featuring an on-board LCD-TFT panel .. 91 Table asked questions .. 93 Table revision history .. 95 List of figuresAN48616/96AN4861 Rev 3 List of figuresFigure embedded graphic system .. 8 Figure module with embedded controller and GRAM .. 9 Figure module without controller nor GRAM .. 10 Figure module without controller nor GRAM and with external framebuffer .. 10 Figure type A or B interface .. 11 Figure type C interface .. 11 Figure interface .. 12 Figure interface .. 12 Figure AHB master in STM32F429/439 and STM32F469/479 smart architecture .. 17 Figure AHB master in STM32F7x6, STM32F7x7, STM32F7x8 and STM32F7x9 smart architecture .. 18 Figure block digram.

8 20 Figure signal interface .. 22 Figure LTDC display frame (active width = 480 pixels) .. 23 Figure programmable timings and resolutions .. 24 Figure fully programmable display resolution with total width up to 4096 pixels and total height up to 2048 lines .. 25 Figure two layers with a background .. 26 Figure window programmable size and position .. 27 Figure data mapping versus color format .. 28 Figure color layer in framebuffer .. 29 Figure format conversion from RGB565 input pixel format to the internal ARGB8888 format .. 29 Figure masters concurrent access to SDRAM.. 35 Figure graphic hardware configuration with external SDRAM .. 38 Figure buffering: synchronizing LTDC with DMA2D or CPU .. 46 Figure of taking advantage from memory slaves split on STM32F4x9 .. 47 Figure access crossing the 1-Kbyte boundary.

9 48 Figure layer window and framebuffer line widths.. 50 Figure dummy bytes to make the line width multiple of 64 bytes.. 51 Figure the two buffers in independent SDRAM banks .. 52 Figure SDRAM and NOR/PSRAM memory swap at default system memory map (MPU disabled).. 55 Figure an RGB666 display panel .. 58 Figure graphic implementation example .. 66 Figure graphic implementation example .. 67 Figure hardware configuration in the STM32F746G-DISCO .. 68 Figure connection in the STM32F746G-DISCO board .. 69 Figure controller module.. 70 Figure : LTDC GPIOs configuration .. 72 Figure : PJ7 pin configuration to LTDC_G0 alternate function .. 72 Figure : LTDC configuration .. 73 Figure : LTDC GPIOs output speed configuration .. 73 Figure : display enable pin (LCD_DISP) configuration .. 74 Figure : setting LCD_DISP pin output level to high.

10 75 Figure : enabling LTDC global and error interrupts .. 76 Figure : clock configuration tab .. 77AN4861 Rev 37/96AN4861 List of figures7 Figure : System clock configuration .. 78 Figure : LTDC pixel clock configuration .. 78 Figure : LTDC timing configuration.. 79 Figure : LTDC Layer1 parameters setting .. 81 Figure : home page .. 82 Figure : image project .. 83 Figure : setting conversion options .. 84 Figure : generating the header file .. 84 Figure SDRAM MPU configuration example .. 87 Figure configuration for Quad-SPI region .. 88 display and graphics overviewAN48618/96AN4861 Rev 31 display and graphics overviewThis section describes the basic terms used on the displays and graphics context in order to provide an overview of the general display and graphics environment. This section also summarizes the display interfaces supported by the STM32 Arm (a)-based Basic graphics conceptsThis section describes a basic embedded graphic system, the display module categories and the display embedded graphic systemA basic embedded graphic system schematic is described in the figure below.