Transcription of Lecture 20 - MIT
1 Spring 20071 Lecture 20 Transistor Amplifiers (II)Other Amplifier StagesOutline Common-drain amplifier Common-gate amplifierReading Assignment:Howe and Sodini; Chapter 8, Sections Spring 200721. Common-drain amplifier A voltage buffer takes the input voltage which may have a relatively large Thevenin resistance and replicates the voltage at the output port, which has a low output resistance Input signal is applied to the gate output is taken from the source To first order, voltage gain 1 Input resistance is high output resistance is low Effective voltage bufferstage vgate iDcannot change vsource Source followerHow does it work?
2 VsVBIASvOUTVDDVSSiSUPRSRL signal source+ Spring 20073 Biasing the Common-drain amplifier Assume device in saturation; neglect RSand RL; neglect CLM ( = 0) Obtain desired output bias voltage Typically set VOUTto halfway between VSSand VDD. output voltage maximum VDD-VDSsat output voltage minimum set by voltage requirement across +VOUTVGS=VTn(VSB)+ISUPW2L nCoxvsVBIASvOUTVDDVSSVSSiSUPRSRL signal source+ Spring 20074 Small-signal AnalysisUnloaded small-signal equivalent circuit model:vin=vgs+voutvout=gmvgs(ro//roc)The n:Avo=gmgm+1ro//roc 1 GSD+-vin+-vgs+-voutgmvgsroroc+-vin+- Spring 20075 Input and output ResistanceInput Impedance : Rin= output Impedance:Rout=1gm+1ro//roc 1gmSmall!
3 Loaded voltage gain:Av=AvoRLRL+Rout RLRL+1gm 1+-vgs+-vingmvgsro//roc+-vtitgmvtro//roc +-vtitRSeffectively:resistance of value 1/gmvin= 0; vt= Spring 20076 Effect of Back Bias Bias is affected VTdepends on VBS VBS= VSS VOUT 0 Small signal figures of merit affected Signal shows up between B and S vbs= -voutIf MOSFET was not fabricated in an isolated p-well, then body is tied to wafer substrate (connected to VSS)Two consequences:vsVBIASvOUTVDDVSSVSSiSUPRSR L signal source+ Spring 20077 Small-signal Analysis (with back-bias)See text for detailsAlso.
4 Avo=gmgm+gmb+1ro//roc gmgm+gmb<1 Rout=1gm+gmb+1ro//roc 1gm+gmbGBSD+-vin+-vgs+-voutgmvgsroroc+-v in+-voutgmvgsro//rocgmbvbsgmbvoutvbs= Spring 20078 Common-Drain Two-Port Model Open circuit voltage gain ~ 1 Input resistance ~ CS Amplifier We want a large input resistance because the controlled generator is voltage controlled output resistance << CS Amplifier We want a low output resistance to deliver most of the output voltage to the loadvin+ vin+ vout+ + (gm + gmb)1(gm + gmb) Spring 20079 Relationship between circuit parameters and device parameters:gm=2 IDWL nCoxgmb= 2 2 p VBSgmCircuit Parameters|Avo|RinRoutDevice*Parametersg mgm+gmb 1gm+gmbISUP -- W -- nCox -- L -- * VBIASis adjusted so that none of the other parameters changeCommon Drainamplifier is often used as a voltage bufferto drive small output loads (in multistage amplifiers, other stages provide the voltage gain).
5 Spring 2007102. Common-Gate Amplifier: A current buffer takes the input current which may have a relatively small Norton resistance and replicates the current at the output port, which has a high output resistance Input signal is applied to the source output is taken from the drain To first order, current gain 1 is -iout.(Current Buffer) Input resistance is low output resistance is high Effective current bufferstageisiOUTVDDVSSVSSiSUPIBIASRL signal Spring 200711 Biasing the Common-Gate Amplifier:Assume device in saturation; neglect RSand RL.
6 Neglect CLM ( = 0)Select bias such that IOUT=0 VOUT= MOSFET in saturation (no channel modulation):But VTdepends on VBS:Must solve these two equations +IOUT+IBIAS=0ID=W2L nCoxVGS VT()2=ISUP= IBIASVT=VTo+ n 2 p VBS 2 p() Spring 200712 Small-signal equivalent circuit(unloaded)it= iout Aio=ioutit= 1 Aiois the short circuit current surprising, since in a MOSFET: ig= 0 GBSD+-isioutgmvgsvgs+-vgsrogmvgsroisgmbv bsvbs= Spring 200713 Input ResistanceDo KCL on input node:it gmvt gmbvt vt itroc//RL()ro=0 Then:Rin=vtit=1+roc//RLrogm+gmb+1ro 1gm+gmb+-gmvgsvgsrogmbvgsrocRL+-vtit+-vt itgmvtrovgs=- Spring 200714 output ResistanceDo KCL on input node: i t gmvgs gmbvgs v t+vgsro=0 Notice also:vgs= i tRsThen.
7 Rout=roc//ro1+Rsgm+gmb+1ro Rout roc//ro1+gmRs()[] roc//gmro()Rs[]+-gmvgsvgsrogmbvgsroc+-vt itRS+-gmvgsvgsrogmbvgs+-vt'it' Spring 200715 Common-Gate Two-Port Model The output resistance depends on the source resistance The CG current buffer is not unilateral Input resistance << CS Amplifier We want a small input resistance because the controlled generator is current controlled output resistance >> CS Amplifier We want a large output resistance to deliver most of the output current to the load iinroc (ro + gmroRS)
8 1gm + Spring 200716 Relationship between circuit figures of merit and device parameters:gm=2 IDWL nCoxgmb= 2 2 p VBSgmro 1 nIDCircuit Parameters|Aio|RinRoutDevice*Parameters- 11gm+gmb()[]smoocRgrr+1//ISUP - W - nCox - L - * VBIASis adjusted so that none of the other parameters changeCommon Gateamplifier is often used as a current transform a current source with medium source resistance to an equal current with high source resistance (in multistage amplifiers, other stages provide the current gain). Spring 200717 What did we learn today?
9 Summary of Key Concepts Common-source amplifier: good voltage amplifierbetter transconductance amplifier Large voltage gain High input resistance Medium / high output resistance Common-drain amplifier: good voltage buffer voltage gain 1 High input resistance Low output resistance Common-gate amplifier: good current buffer Current gain 1 Low input resistance High output resistanc