LM5117/Q1 Wide Input Range Synchronous Buck Controller ...

1 VOUTSSRESRTCOMPFBRAMPPGNDCSGCSLOSWHOHBVC CVINAGNDUVLOVCCDISDEMBCMVINVOUTSWLM5117 ProductFolderSample &BuyTechnicalDocumentsTools &SoftwareSupport &CommunityLM5117,LM5117-Q1 SNVS698F APRIL2011 REVISEDAUGUST2015LM5117/Q1 Wide Input RangeSynchronousBuck Controllerwith AnalogCurrentMonitor1 Features3 DescriptionTheLM5117is a synchronousbuckcontroller1 LM5117-Q1is Qualifiedfor Automotiveintendedfor step-downregulatorapplicationsfromaAppli cationshighvoltageor AEC-Q100 QualifiedWiththe FollowingResults:controlmethodis baseduponcurrentmodecontrol DeviceTemperatureGrade1: -40 C to 125 Cutilizingan feed-forward,cycle-by-AmbientOperatingTe mperatureRangecyclecurrentlimitingand easeof loopcompensation.

2 EmulatedPeakCurrentModeControlThe use of an emulatedcontrolrampreducesnoise V to 65 Vsensitivityof thepulse-widthmodulationcircuit, verysmalldutycyclesnecessaryin high inputvoltageapplications. AdaptiveDead-TimeOutputDriverControl Free-Runor SynchronizableClockup to 750 kHzTheoperatingfrequencyis programmablefrom50kHz to 750 LM5117drivesexternalhigh- OptionalDiodeEmulationModesideandlow-sid eNMOS powerswitcheswith user-selectablediode improvedefficiencyat lightload highvoltagebiasregulatorthat allows HiccupModeOvercurrentProtectionLM5117 s ProgrammableSoft-Startand Trackingfeaturesincludethermalshutdown,f requency ProgrammableLine UndervoltageLockoutsynchronization.

3 Hiccupmodecurrentlimit,and ProgrammableSwitchoverto ExternalBiasSupplyadjustableline undervoltagelockout. ThermalShutdownDeviceInformation(1)2 ApplicationsPARTNUMBERPACKAGEBODYSIZE(NO M)LM5117 HTSSOP(20) AutomotiveInfotainmentLM5117-Q1 WQFN(24) IndustrialDC-DCMotorDrivers(1) For all availablepackages,see the orderableaddendumat AutomotiveUSBP owerthe end of the datasheet. TelecomServerTypicalApplication1An IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand ,LM5117-Q1 SNVS698F APRIL2011 Applicationand Pin Configurationand (LM5117).

4 510 (LM5117-Q1).. Deviceand Mechanical,Packaging,and RevisionHistoryNOTE:Pagenumbersfor previousrevisionsmay differfrompagenumbersin the (March2013)to RevisionFPage AddedDeviceInformationandPin Configurationand Functionssections,ESDR atingtable,FeatureDescription,DeviceFunc tionalModes,Applicationand Implementation,PowerSupplyRecommendation s,Layout,DeviceandDocumentationSupport, andMechanical,Packaging,and Changed H into F ..29 ChangesfromRevisionD (March2013)to RevisionEPage Changedlayoutof NationalDataSheetto TI 2011 2015,TexasInstrumentsIncorporatedProduct FolderLinks.

5 LM5117LM5117-Q1 PGNDUVLOAGNDDEMBRESSSRTFBCOMPCM162345892 0141519181716131211 VINLOHBHOSWVCCCSGCSRAMP21222324 VCCDIS710 NCNCNCNCEPUVLOAGNDDEMBRESSSRTFBCOMPCMVIN PGNDLOHBHOSWVCCCSGCSRAMP1623458920141519 181716131211 EPVCCDIS107LM5117, APRIL2011 REVISEDAUGUST20155 Pin Configurationand FunctionsPWPP ackage20-PinHTSSOPTop ViewRTWP ackage24-PinWQFNTop ViewCopyright 2011 2015,TexasInstrumentsIncorporatedSubmitD ocumentationFeedback3 ProductFolderLinks:LM5117LM5117-Q1LM5117 ,LM5117-Q1 SNVS698F APRIL2011 FunctionsPINTYPE(1)DESCRIPTIONHTSSOPWQFN NAME124 UVLOU ndervoltagelockoutprogrammingpin.

6 If the UVLOpin voltageis V, theregulatoris in the shutdownmodewith all the UVLOpin V and less , the regulatoris in standbymodewith the VCCregulatoroperational,the SS pin grounded,and no switchingat the HO and LO the UVLOpin voltageis , the SS pin is allowedto rampand pulsewidthmodulatedgatedrivesignalsare deliveredto the HO and LO 20 A currentsourceis and flowsthroughthe externalUVLO resistorsto enablesdiodeemulationwhenin the low diodeemulationmode,the low-sideNMOSis latchedoff for the remainderof the PWMcycleafterdetectingreversecurrentflow (currentflow fromoutputto groundthroughthe low-Iside NMOS).

7 WhenDEMBis high,diodeemulationis disabledallowingcurrentto flow ineitherdirectionthroughthe 50-k pull-downresistorinternalto theLM5117holdsDEMBpin low and enablesdiodeemulationif the pin is left restarttimerpin that configuresthe capacitoron theRESpin determinesthe time the controllerremainsoff hiccupmodecommenceswhenthe controllerexperiences256 consecutivePWMcyclesof occurs,a 10- A currentsourcechargesthe RESpin capacitorto the thresholdand externalcapacitorand an internal10- A currentsourceset the ramprate of the SS pin is held low whenVCC< 5 V, UVLO< or internaloscillatoris programmedwith a singleresistorbetweenRT and the recommendedmaximumoscillatorfrequencyis internaloscillatorcanIbe synchronizedto an externalclockby couplinga positivepulseinto the RT pin througha the V voltagereferenceand disablesthe VCCDIS>.

8 The internalVCCregulatoris an internal500-k pulldownresistorto enableIthe VCCregulatorwhenthe pin is left internal500-k pull-downresistorcanbe overriddenby with a resistordividerconnectedto anexternalbias the resistordividerfromthe outputIto this pin sets the regulationthresholdat the FB pin is the loop compensationnetworkshouldbeOconnectedbet weenthis pin and the FB the sensedinductorcurrentis and shouldbe left floatingwhenthe pin is not externalresistorand capacitorconnectedbetweenthe SW pin, theRAMPpin and the AGNDpin sets the componentIvaluesproducesa RAMP signalthat emulatesthe AC componentof the inductorwith aslopeproportionalto the high-sideof the the the low-sideofGthe for the low-sideOof the the gateof the low-sidesynchronousP/O/INMOS transistorthrougha short,low Locallydecoupleto PGND usinga low ESR/ESLcapacitorlocatedasI/Ocloseto controlleras the the bootstrapcapacitor,the sourceOterminalof the high-sideNMOS transistorand the drainterminalof the low-sideNMOS througha short.

9 Low the gateof the high-sideNMOS transistorPthrougha short,low inductancepath.(1)I = Input ,O = Output,G = Ground,P = Power4 SubmitDocumentationFeedbackCopyright 2011 2015,TexasInstrumentsIncorporatedProduct FolderLinks:LM5117LM5117-Q1LM5117, APRIL2011 REVISEDAUGUST2015 Pin Functions(continued)PINTYPE(1)DESCRIPTIO NHTSSOPWQFNNAME1920 HBHigh-sidedriversupplyfor the the cathodeof theexternalbootstrapdiodeand to the bootstrapcapacitorsuppliesP/Icurrentto chargethe high-sideNMOS gateand shouldbe placedas closeto controlleras the of the solderedto the ground-planeto (unlessotherwisenoted)(1)MINMAXUNITVIN to AGND to AGND to SW AGND(2) to SW + to AGND + , DEMB,RES,VCCDIS,UVLOto AGND , COMPto AGND(3)

10 , RAMP,RT to AGND , CSG,PGND,to AGND ,Tstg 55150 CJunctiontemperature 40150 C(1)StressesbeyondthoselistedunderAbsolu teMaximumRatingsmay causepermanentdamageto the stressratingsonly,whichdo not implyfunctionaloperationof the deviceat theseor any otherconditionsbeyondthoseindicatedunder RecommendedOperatingConditions. Exposureto absolute-maximum-ratedconditionsfor extendedperiodsmay affectdevicereliability.(2)SeeApplicatio nand Implementationwheninputsupplyvoltageis less thanthe VCCvoltage.(3)Thesepins are suchthey are not specifiedto havean (LM5117)VALUEUNITH uman-bodymodel(HBM),per ANSI/ESDA/JEDECJS-001(1) 2000VV(ESD)ElectrostaticdischargeCharged -devicemodel(CDM),per JEDEC specificationJESD22-V 750VC101(2)(1)JEDEC documentJEP155statesthat 500-VHBM allowssafe manufacturingwith a standardESDcontrolprocess.