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Low-voltage differential signaling Receiver …

lvds Receiver MODULE8 Lines-SOPLVDS Module3D Plus SA reserves the right to cancel product or specifications without notice3 DFP-0373-REV 4- differential signaling ReceiverMODULE3 DLV3208VS13733V Eight Line Receivers, based on QuadPin Assignment (Top View)SOP 34 (Pitch : mm)1 Rin1-18 Rin7-2 Rin1+19 Rin7+3 Rout120 Rout74EN121#EN25 Rout222 Rout86 Rin2+23 Rin8+7 Rin2-24 Rin8-8 GND25 Vdd9 GND26 Vdd10 Rin5-27 Rin3-11 Rin5+28 Rin3+12 Rout529 Rout313EN230#EN114 Rout631 Rout415 Rin6+32 Rin4+16 Rin6-33 Rin4-17 GND34 VddFUNCTIONAL Block DiagramFeatures >400 Mbps (200 MHz) switching rates 450 mV differential signalling V power supply Ultra low power dissipation ns differential skew (typical)

LVDS Receiver MODULE 8 Lines-SOP LVDS Module 3D Plus SA reserves the right to cancel product or specifications without notice 3DFP-0373-REV 4- DEC.2013

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  Differential, Voltage, Lvds, Signaling, Low voltage differential signaling

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Transcription of Low-voltage differential signaling Receiver …

1 lvds Receiver MODULE8 Lines-SOPLVDS Module3D Plus SA reserves the right to cancel product or specifications without notice3 DFP-0373-REV 4- differential signaling ReceiverMODULE3 DLV3208VS13733V Eight Line Receivers, based on QuadPin Assignment (Top View)SOP 34 (Pitch : mm)1 Rin1-18 Rin7-2 Rin1+19 Rin7+3 Rout120 Rout74EN121#EN25 Rout222 Rout86 Rin2+23 Rin8+7 Rin2-24 Rin8-8 GND25 Vdd9 GND26 Vdd10 Rin5-27 Rin3-11 Rin5+28 Rin3+12 Rout529 Rout313EN230#EN114 Rout631 Rout415 Rin6+32 Rin4+16 Rin6-33 Rin4-17 GND34 VddFUNCTIONAL Block DiagramFeatures >400 Mbps (200 MHz) switching rates 450 mV differential signalling V power supply Ultra low power dissipation ns differential skew (typical)

2 6 ns maximum propagation delay Conforms to ANSI/TIA/EIA-644 lvds standard Integrated 110- Line Termination Resistors Cold sparing all I/O pins Variable Temperature range 0 C to 70 C-40 C to +85 C-55 C to +125 C Available screening option for high reliabilityapplicationGeneral descriptionThe 3 DLV3208VS1373 is Eight CMOS differential linereceiver designed for applications requiring ultra lowpower dissipation and high data rates. The device isdesigned to support data rates in excess of 400 Mbps(200 MHz) utilizing Low voltage differential signaling ( lvds ) 3 DLV3208VS1373 accepts low voltage (350 mVtypical) differential input signals and translates them to3V CMOS output 3 DLV3208VS1373 and companion line driver(3 DLV3108VS1372) provide a new alternative to highpower psuedo-ECL devices for high speed point-to-point interface Receiver MODULE8 Lines-SOPLVDS Module3D Plus SA reserves the right to cancel product or specifications without notice3 DFP-0373-REV 4- differential signaling ReceiverMODULE3 DLV3208VS13733V Eight Line Receivers, based on (mm)Max.

3 Weight : Tools3 DLV3208VS1373 ENPLASOTS-_____ Modified by 3D PLUSM echanical DrawingABSOLUTE MAXIMUM RATINGSP arameterSymbolValueUnitSupply to voltage (Din) to VDD+ temperatureTstg-65 to 150 CDC OPERATING CONDITIONSP arameterSymbolMinMaxUnitSupply High Low RangeC= 0 C ~ +70 CI= -40 C ~ +85 CS= -55 C ~ +125 CQuality LevelN= Commercial GradeB= Industrial GradeS= Space GradeC= CustomDC CharacteristicsParameterSymbolMinMaxUnit differential Input High ThresholdVTH+100mVDifferential Input Low ThresholdVTL-100mVNote:Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS"are operation should be restricted to recommended operating to higher than recommended voltage for extended periods of time could affectdevice reliabilityMain Sales OfficeFRANCE3D PLUS408, rue H l ne Boucher BUC CedexTel : 33 (0)1 30 83 26 50 Fax : 33 (0)1 39 56 25 89 Web PLUS USA, Inc6633 Eldorado ParkwaySuite 420 Mckinney, TX 75070 Tel : (214) 733-8505e-mail


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