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MCP3202 - 2.7V Dual Channel 12-Bit A/D Converter with SPI ...

1999-2011 Microchip Technology 1 MCP3202 Features 12-Bit resolution 1 LSB maximum DNL 1 LSB maximum INL ( MCP3202 -B) 2 LSB maximum INL ( MCP3202 -C) analog inputs programmable as single-ended or pseudo-differential pairs On-chip sample and hold SPI Serial Interface (Modes 0,0 and 1,1) Single supply operation: 100 ksps maximum sampling rate at VDD=5V 50 ksps maximum sampling rate at VDD= Low power CMOS technology 500 nA typical standby current, 5 A maximum 550 A maximum active current at 5V Industrial temp range: -40 C to +85 C 8-pin MSOP, PDIP, SOIC and TSSOP packagesApplications Sensor Interface Process Control Data Acquisition Battery Operated SystemsFunctional Block DiagramDescriptionThe MCP3202 is a successive approximation 12-bitanalog-to- digital (A/D) Converter with on-board sampleand hold circuitry.

Aug 02, 2011 · analog-to-digital (A/D) converter with on-board sample and hold circuitry. The MCP3202 is programmable to provide a single pseudo-differential input pair or dual single-ended inputs. Differential Nonlinearity (DNL) is specified at ±1 LSB, and Integral Nonlinearity (INL) is offered in ±1 LSB (MCP3202-B) and ±2 LSB (MCP3202-C) versions.

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  Converter, Analog, Digital, Dual, To digital

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Transcription of MCP3202 - 2.7V Dual Channel 12-Bit A/D Converter with SPI ...

1 1999-2011 Microchip Technology 1 MCP3202 Features 12-Bit resolution 1 LSB maximum DNL 1 LSB maximum INL ( MCP3202 -B) 2 LSB maximum INL ( MCP3202 -C) analog inputs programmable as single-ended or pseudo-differential pairs On-chip sample and hold SPI Serial Interface (Modes 0,0 and 1,1) Single supply operation: 100 ksps maximum sampling rate at VDD=5V 50 ksps maximum sampling rate at VDD= Low power CMOS technology 500 nA typical standby current, 5 A maximum 550 A maximum active current at 5V Industrial temp range: -40 C to +85 C 8-pin MSOP, PDIP, SOIC and TSSOP packagesApplications Sensor Interface Process Control Data Acquisition Battery Operated SystemsFunctional Block DiagramDescriptionThe MCP3202 is a successive approximation 12-bitanalog-to- digital (A/D) Converter with on-board sampleand hold circuitry.

2 The MCP3202 is programmable to provide a singlepseudo-differential input pair or dual single-endedinputs. Differential Nonlinearity (DNL) is specified at 1 LSB, and Integral Nonlinearity (INL) is offered in 1 LSB ( MCP3202 -B) and 2 LSB ( MCP3202 -C)versions. Communication with the device is done using a simpleserial interface compatible with the SPI protocol. Thedevice is capable of conversion rates of up to 100 kspsat 5V and 50 ksps at MCP3202 operates over a broad voltage range, to Low-current design permits operation withtypical standby and active currents of only 500 nA and375 A, respectively.

3 The MCP3202 is offered in 8-pin MSOP, PDIP, TSSOPand 150 mil SOIC TypesComparatorSampleand Hold12-Bit SARDACC ontrol LogicCS/SHDNVSSVDDCLKDOUTS hiftRegisterCH0 ChannelMuxInputCH1 DINMCP320212348765CH0CH1 VSSCS/SHDNVDD/VREFCLKDOUTDINPDIP, MSOP, SOIC, dual Channel 12-Bit A/D Converter with SPI Serial InterfaceMCP3202DS21034F-page 2 1999-2011 Microchip Technology CHARACTERISTICSA bsolute Maximum Ratings Inputs and Outputs to VDD+ C to +150 CAmbient temperature with power C to +150 CMaximum Junction Temperature (TJ) ..+150 CESD Protection On All Pins (HBM) 4kV Notice: Stresses above those listed under AbsoluteMaximum Ratings may cause permanent damage to thedevice.

4 This is a stress rating only and functional operation ofthe device at those or any other conditions above thoseindicated in the operational listings of this specification is notimplied. Exposure to maximum rating conditions for extendedperiods may affect device CHARACTERISTICSE lectrical Characteristics: Unless otherwise noted, all parameters apply at VDD = , VSS = 0V,TA = -40 C to +85 C, fSAMPLE = 100 ksps and fCLK = 18* Rate:Conversion TimetCONV 12clock cyclesAnalog Input Sample cyclesThroughput RatefSAMPL 10050kspskspsVDD = VREF = 5 VVDD = VREF = Accuracy:Resolution12bitsIntegral NonlinearityINL 1 1 2 LSBLSBMCP3202-BMCP3202-CDifferential Nonlinearity DNL 1 LSBNo missing codes overtemperatureOffset Error 3 LSBGain Error 5 LSBD ynamic Performance.

5 Total Harmonic DistortionTHD -82 dBVIN = to @1 kHzSignal-to-Noise and Distortion (SINAD)SINAD 72 dBVIN = to @1 kHzSpurious Free Dynamic RangeSFDR 86 dBVIN = to @1 kHzAnalog Inputs:Input Voltage Range for CH0 or CH1 in Single-Ended Mode VSS VDDVI nput Voltage Range for IN+ in Pseudo-Differential ModeIN+IN- VDD+IN-See Sections and Voltage Range for IN- in Pseudo-Differential ModeIN-VSS-100 VSS+100mVSee Sections and Current .001 1 ASwitch ResistanceRSS 1k See Figure 4-1 Sample CapacitorCSAMPLE 20 pFSee Figure 4-1 digital Input/Output:Data Coding FormatStraight BinaryHigh Level Input VDD VLow Level Input VoltageVIL VDDVNote 1:This parameter is established by characterization and not 100% :Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity performance, especially at elevated temperatures.

6 See Section Maintaining Minimum Clock Speed for more information. 1999-2011 Microchip Technology 3 MCP3202 TEMPERATURE CHARACTERISTICS High Level Output VIOH = -1 mA, VDD = Level Output VoltageVOL VIOL = 1 mA, VDD = Leakage CurrentILI-10 10 AVIN = VSS or VDDO utput Leakage CurrentILO-10 10 AVOUT = VSS or VDDPin Capacitance(All Inputs/Outputs)CIN, COUT 10pFVDD = (Note 1)TA = +25 C, f = 1 MHzTiming Parameters:Clock FrequencyfCLK = 5V (Note 2)VDD = (Note 2)Clock High TimetHI 2 MHzClock Low TimetLO 2 MHzCS Fall To First Rising CLK EdgetSUCS100 nsData Input Setup TimetSU50 nsData Input Hold TimetHD50 nsCLK Fall To Output Data ValidtDO 200nsSee Test Circuits, Figure 1-2 CLK Fall To Output EnabletEN 200nsSee Test Circuits, Figure 1-2CS Rise To Output DisabletDIS 100nsSee Test Circuits, Figure 1-2 Note 1CS Disable TimetCSH500 nsDOUT Rise TimetR 100nsSee Test Circuits, Figure 1-2 Note 1 DOUT Fall TimetF 100nsSee Test Circuits, Figure 1-2 Note 1 Power Requirements.

7 Operating CurrentIDD 375550 AVDD = , DOUT unloadedStandby CurrentIDDS 5 ACS = VDD = Electrical Specifications: Unless otherwise indicated, VDD= + to + , VSS= RangesSpecified Temperature RangeTA-40 +85 COperating Temperature RangeTA-40 +85 CStorage Temperature RangeTA-65 +150 CThermal Package ResistancesThermal Resistance, 8L-MSOP JA 211 C/WThermal Resistance, 8L-PDIP JA C/WThermal Resistance, 8L-SOIC JA C/WThermal Resistance, 8L-TSSOP JA 139 C/WELECTRICAL CHARACTERISTICS (CONTINUED)Electrical Characteristics: Unless otherwise noted, all parameters apply at VDD = , VSS = 0V,TA = -40 C to +85 C, fSAMPLE = 100 ksps and fCLK = 18* 1:This parameter is established by characterization and not 100% :Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity performance, especially at elevated temperatures.

8 See Section Maintaining Minimum Clock Speed for more 4 1999-2011 Microchip Technology 1-1:Serial INtSUtHDtSUCStCSHtHItLODOUTtENtDOtRtFLSB MSB OUTtDISNULL BIT 1999-2011 Microchip Technology 5 MCP3202 FIGURE 1-2:Te s t C i r c u i ts .VIHTDISCSDOUTW aveform 1*DOUTW aveform 2 90%10%* Waveform 1 is for an output with internal conditionssuch that the output is high, unless disabled by theoutput control. Waveform 2 is for an output with internal conditionssuch that the output is low, unless disabled by theoutput Waveforms for tDISTe s t P o i n Circuit for tR, tF, tDO3k CL = 100 pFTe s t P o i n tDOUTLoad Circuit for tDIS and tEN3k 100 pFtDIS Waveform 2tDIS Waveform 1 CSCLKDOUTtEN12B11 Voltage Waveforms for tEN tEN WaveformVDDVDD/2 VSS34 DOUTtRVoltage Waveforms for tR, tFCLKDOUTtDOVoltage Waveforms for tDOtFVOHVOLMCP3202DS21034F-page 6 1999-2011 Microchip Technology PERFORMANCE CHARACTERISTICSNote.

9 Unless otherwise indicated, VDD = 5V, VSS = 0V, fSAMPLE = 100 ksps, fCLK = 18* fSAMPLE, TA = +25 2-1:Integral Nonlinearity (INL) vs. Sample 2-2:Integral Nonlinearity (INL) vs. 2-3:Integral Nonlinearity (INL) vs. Code (Representative Part).FIGURE 2-4:Integral Nonlinearity (INL) vs. Sample Rate (VDD = ).FIGURE 2-5:Integral Nonlinearity (INL) vs. 2-6:Integral Nonlinearity (INL) vs. Code (Representative Part, VDD = ).Note:The graphs provided following this note are a statistical summary based on a limited number of samplesand are provided for informational purposes only. The performance characteristics listed herein are nottested or guaranteed.

10 In some graphs, the data presented may be outside the specified operating range( , outside specified power supply range) and therefore outside the warranted (LSB)Sample Rate (ksps)Positive INLNeg ative (V)INL (LSB)Positive INLN egative INLfSAMPLE = 100 1536 2048 2560 3072 3584 4096 digital CodeINL (LSB) Rate (ksps)INL (LSB)VDD = INLN egative (V)INL (LSB)Positive INLN egative INLfSAMPLE = 50 CodeINL (LSB)VDD = = 50 ksps 1999-2011 Microchip Technology 7 MCP3202 Note: Unless otherwise indicated, VDD = 5V, VSS = 0V, fSAMPLE = 100 ksps, fCLK = 18* fSAMPLE, TA = +25 2-7:Integral Nonlinearity (INL) vs.


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