Not recommended for new designs ... - Microchip Technology

1 A Microchip Technology Company 2011 Silicon Storage Technology , recommended for New Mbit / 32 Mbit / (x16) Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Features Organized as 1M x16: SST39VF1601/16022M x16: SST39VF3201/3202 Single Voltage Read and Write Operations Superior Reliability Endurance: 100,000 Cycles (Typical) Greater than 100 years Data Retention Low Power Consumption (typical values at 5 MHz) Active Current: 9 mA (typical) Standby Current: 3 A (typical) Auto Low Power Mode: 3 A (typical) Hardware Block-Protection/WP# Input Pin Top Block-Protection (top 32 KWord)for SST39VF1602/3202 Bottom Block-Protection (bottom 32 KWord)for SST39VF1601/3201 Sector-Erase Capability Uniform 2 KWord sectors Block-Erase Capability Uniform 32 KWord blocks Chip-Erase Capability Erase-Suspend/Erase-Resume Capabilities Hardware Reset Pin (RST#) Security-ID Feature SST: 128 bits.

2 User: 128 bits Fast Read Access Time: 70ns Latched Address and Data Fast Erase and Word-Program: Sector-Erase Time: 18 ms (typical) Block-Erase Time: 18 ms (typical) Chip-Erase Time: 40 ms (typical) Word-Program Time: 7 s (typical) Automatic Write Timing Internal VPPG eneration End-of-Write Detection Toggle Bits Data# Polling CMOS I/O Compatibility JEDEC Standard Flash EEPROM Pinouts and command sets Packages Available 48-lead TSOP (12mm x 20mm) 48-ball TFBGA (6mm x 8mm) All devices are RoHS compliant The SST39VF1601/1602 and SST39VF3201/3202 devices are 1M x16 and 2Mx16, respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured withSST's proprietary, high performance CMOS SuperFlash Technology .

3 The split-gate cell design and thick-oxide tunneling injector attain better reliability and man-ufacturability compared with alternate approaches. The SST39VF1601/1602/3201/3202 write (Program or Erase) with a power supply. These devicesconforms to JEDEC standard pinouts for x16 recommended for new designs . Please use SST39VF1601 Cand SST39VF3201B. 2011 Silicon Storage Technology , Mbit / 32 Mbit Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Not recommended for New DesignsA Microchip Technology CompanyProduct DescriptionThe SST39VF160x and SST39VF320x devices are 1M x16 and 2M x16, respectively, CMOS Multi-Purpose Flash Plus (MPF+) manufactured with SST s proprietary, high performance CMOS Super-Flash Technology .

4 The split-gate cell design and thick-oxide tunneling injector attain better reliabilityand manufacturability compared with alternate approaches. The SST39VF160x/320x write (Programor Erase) with a power supply. These devices conform to JEDEC standard pinouts for high performance Word-Program, the SST39VF160x/320x devices provide a typical Word-Program time of 7 sec. These devices use Toggle Bit or Data# Polling to indicate the completion ofProgram operation. To protect against inadvertent write, they have on-chip hardware and SoftwareData Protection schemes. Designed, manufactured, and tested for a wide spectrum of applications,these devices are offered with a guaranteed typical endurance of 100,000 cycles.

5 Data retention israted at greater than 100 SST39VF160x/320x devices are suited for applications that require convenient and economicalupdating of program, configuration, or data memory. For all system applications, they significantlyimprove performance and reliability, while lowering power consumption. They inherently use lessenergy during Erase and Program than alternative flash technologies. The total energy consumed is afunction of the applied voltage, current, and time of application. Since for any given voltage range, theSuperFlash Technology uses less current to program and has a shorter erase time, the total energyconsumed during any Erase or Program operation is less than alternative flash technologies.

6 Thesedevices also improve flexibility while lowering the cost for program, data, and configuration SuperFlash Technology provides fixed Erase and Program times, independent of the number ofErase/Program cycles that have occurred. Therefore the system software or hardware does not haveto be modified or de-rated as is necessary with alternative flash technologies, whose Erase and Pro-gram times increase with accumulated Erase/Program meet high density, surface mount requirements, the SST39VF160x/320x are offered in 48-leadTSOP and 48-ball TFBGA packages. See Figures 2 and 3 for pin assignments. 2011 Silicon Storage Technology , Mbit / 32 Mbit Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Not recommended for New DesignsA Microchip Technology CompanyBlock DiagramFigure 1:Functional Block DiagramY-DecoderI/O Buffers and Data Latches1223 Buffer LatchesX-DecoderDQ15-DQ0 Memory AddressOE#CE#WE#SuperFlashMemoryControl LogicWP#RESET# 2011 Silicon Storage Technology , Mbit / 32 Mbit Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Not recommended for New DesignsA Microchip Technology CompanyPin AssignmentFigure 2:Pin Assignments for 48-lead TSOPF igure 3.

7 Pin assignments for 48-ball TFBGAA15A14A13A12A11A10A9A8A19A20WE#RST# NCWP#NCA18A17A7A6A5A4A3A2A11234567891011 12131415161718192021222324A16 NCVSSDQ15DQ7DQ14DQ6DQ13DQ5DQ12DQ4 VDDDQ11DQ3DQ10DQ2DQ9DQ1DQ8DQ0OE#VSSCE#A0 4847464544434241403938373635343332313029 282726251223 48-tsop PinoutTop ViewDie UpSST39VF160x/320xA15A14A13A12A11A10A9A8 A19 NCWE#RST#NCWP#NCA18A17A7A6A5A4A3A2A1 SST39VF1601/1602 SST39VF3201/3202A13A9WE#NCA7A3A12A8 RST#WP#A17A4A14A10 NCA18A6A2A15A11A19A20A5A1A16DQ7DQ5DQ2DQ0 A0 NCDQ14DQ12DQ10DQ8CE#DQ15DQ13 VDDDQ11DQ9OE#VSSDQ6DQ4DQ3DQ1 VSS1223 48-tfbga B3K VIEW (balls facing down)654321 ABCDEFGHA13A9WE#NCA7A3A12A8 RST#WP#A17A4A14A10 NCA18A6A2A15A11A19 NCA5A1A16DQ7DQ5DQ2DQ0A0 NCDQ14DQ12DQ10DQ8CE#DQ15DQ13 VDDDQ11DQ9OE#VSSDQ6DQ4DQ3DQ1 VSS1223 48-tfbga B3K VIEW (balls facing down)654321 ABCDEFGH 2011 Silicon Storage Technology , Mbit / 32 Mbit Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Not recommended for New DesignsA Microchip Technology CompanyTable 1.

8 Pin DescriptionSymbol Pin NameFunctionsAMS1-A0 Address Inputs To provide memory Sector-Erase AMS-A11address lines will select the Block-Erase AMS-A15address lines will select the Input/output Tooutput data during Read cycles and receive input data during Write is internally latched during a Write outputs are in tri-state when OE# or CE# is #Write ProtectTo protect the top/bottom boot block from Erase/Program operation #ResetTo reset and return the device to Read #Chip EnableTo activate the device when CE# is #Output Enable To gate the data output #Write EnableTo control the Write Supply To provide power supply voltage: Connection Unconnected 250281.

9 AMS= Most significant addressAMS=A19for SST39VF1601/1602, and A20for SST39VF3201/3202 2011 Silicon Storage Technology , Mbit / 32 Mbit Multi-Purpose Flash PlusSST39VF1601 / SST39VF3201 SST39VF1602 / SST39VF3202 Not recommended for New DesignsA Microchip Technology CompanyDevice OperationCommands are used to initiate the memory operation functions of the device. Commands are writtento the device using standard microprocessor write sequences. A command is written by asserting WE#low while keeping CE# low. The address bus is latched on the falling edge of WE# or CE#, whicheveroccurs last. The data bus is latched on the rising edge of WE# or CE#, whichever occurs SST39VF160x/320x also have theAuto Low Powermode which puts the device in a nearstandby mode after data has been accessed with a valid Read operation.

10 This reduces the IDDactiveread current from typically 9 mA to typically 3 A. The Auto Low Power mode reduces the typical IDDactive read current to the range of 2 mA/MHz of Read cycle time. The device exits the Auto Low Powermode with any address transition or control signal transition used to initiate another Read cycle, withno access time penalty. Note that the device does not enter Auto-Low Power mode after power-up withCE# held steadily low, until the first address transition or CE# is driven Read operation of the SST39VF160x/320x is controlled by CE# and OE#, both have to be low forthe system to obtain data from the outputs. CE# is used for device selection.