Transcription of NuMicro™ Family - Nuvoton
1 Nano100 March 31, 2016 Page 1 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL numicro Family Nano100 series Technical Reference Manual The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton . Nuvoton is providing this document only for reference purposes of numicro microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions. All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation. Nano100 March 31, 2016 Page 2 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Table of Contents LIST OF FIGURES .. 7 LIST OF TABLES .. 12 1 GENERAL DESCRIPTION .. 13 2 FEATURES .. 15 Nano100 Features Base Line .. 15 Nano110 Features LCD Line .. 21 Nano120 Features USB Connectivity 27 Nano130 Features Advanced Line.
2 33 3 PARTS INFORMATION LIST AND PIN CONFIGURATION .. 39 numicro Nano100 series Selection Code .. 39 numicro Nano100 Products Selection Guide .. 40 numicro Nano100 Base Line Selection Guide .. 40 numicro Nano110 LCD Line Selection Guide .. 40 numicro Nano120 USB Connectivity Line Selection Guide .. 40 numicro Nano130 Advanced Line Selection Guide .. 41 Pin Configuration .. 42 numicro Nano100 Pin Diagrams .. 42 numicro Nano110 Pin Diagrams .. 45 numicro Nano120 Pin Diagrams .. 47 numicro Nano130 Pin Diagrams .. 50 Pin Description .. 52 numicro Nano100 Pin Description .. 52 numicro Nano110 Pin Description .. 63 numicro Nano120 Pin Description .. 77 numicro Nano130 Pin Description .. 88 4 BLOCK DIAGRAM .. 102 Nano100 Block Diagram .. 102 Nano110 Block Diagram .. 103 Nano120 Block Diagram .. 104 Nano130 Block Diagram .. 105 5 FUNCTIONAL DESCRIPTION .. 106 ARM CORTEX -M0 CORE .. 106 System Timer (SysTick) .. 107 System Timer Control Register Map.
3 107 System Timer Control Register Description .. 109 System Control Registers .. 111 System Control Register Memory Map .. 111 System Control Register Description .. 112 Memory Organization .. 116 Overview .. 116 Memory Map .. 116 Nano100 March 31, 2016 Page 3 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Nested Vectored Interrupt Controller (NVIC) .. 118 Overview .. 118 Features .. 118 Exception Model and System Interrupt Map .. 118 Vector Table .. 120 Operation Description .. 120 NVIC Control Register Map .. 122 NVIC Control Register Description .. 123 Interrupt Source Control Registers .. 135 System Manager .. 143 Overview .. 143 Features .. 143 Functional Description .. 143 Register and Memory Map .. 146 Register Description .. 148 Clock Controller .. 221 Overview .. 221 Features .. 221 Block Diagram .. 222 Functional Description .. 222 Register and Memory Map .. 225 Register Description .. 226 FLASH Memory Controller (FMC).
4 249 Overview .. 249 Features .. 249 Block Diagram .. 249 Functional Description .. 250 Register and Memory Map .. 261 Register Description .. 261 External Bus Interface .. 270 Overview .. 270 Features .. 270 Block Diagram .. 270 Functional Description .. 271 Register and Memory Map .. 275 Register Description .. 276 General Purpose I/O Controller .. 279 Overview .. 279 Features .. 279 Block Diagram .. 279 Functional Description .. 279 Register and Memory Map .. 281 Register Description .. 286 DMA Controller .. 303 Overview .. 303 Features .. 303 Block Diagram .. 305 Nano100 March 31, 2016 Page 4 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Functional Description .. 306 Register Map .. 309 Register Description .. 310 Timer Controller .. 354 Overview .. 354 Features .. 354 Block Diagram .. 354 Functional Description .. 355 Register and Memory Map .. 359 Register Description .. 361 Pulse Width Modulation (PWM).
5 375 Overview .. 375 Features .. 376 Block Diagram .. 377 Functional Description .. 379 Register and Memory Map .. 386 Register Description .. 388 Watchdog Timer Controller .. 412 Overview .. 412 Features .. 412 Block Diagram .. 412 Functional Description .. 413 Register and Memory Map .. 415 Register Description .. 416 Window Watchdog Timer Controller .. 420 Overview .. 420 Features .. 420 Block Diagram .. 420 Functional Description .. 420 Register and Memory Map .. 422 Register Description .. 422 RTC .. 427 Overview .. 427 Features .. 427 Block Diagram .. 428 Functional Description .. 429 Register and Memory Map .. 432 Register Description .. 434 UART Controller .. 451 Overview .. 451 Features .. 452 Block Diagram .. 453 Functional Description .. 456 Register and Memory Map .. 464 Registers Description .. 465 Smart Card Host Interface (SC) .. 488 Overview .. 488 Nano100 March 31, 2016 Page 5 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Features.
6 488 Block Diagram .. 489 Functional Description .. 491 Register and Memory Map .. 497 Register Description .. 499 I2C .. 533 Overview .. 533 Features .. 534 Functional Description .. 534 Register and Memory Map .. 544 Register Description .. 546 I2S .. 557 Overview .. 557 Features .. 557 Block Diagram .. 557 Functional Description .. 558 Register and Memory Map .. 560 Register Description .. 561 SPI .. 572 Overview .. 572 Features .. 572 Block Diagram .. 573 Functional Description .. 573 Register and Memory Map .. 587 Register Description .. 589 USB .. 605 Overview .. 605 Features .. 605 Block Diagram .. 606 Functional Description .. 606 Register and Memory Map .. 610 Register Description .. 612 LCD Display Driver .. 629 Overview .. 629 Features .. 629 Block Diagram .. 630 Functional Description .. 631 Register and Memory Map .. 634 Register Description .. 635 Application Circuit .. 642 Analog to Digital Converter (ADC).
7 645 Overview .. 645 Features .. 645 Block Diagram .. 646 Functional Description .. 647 Register and Memory Map .. 658 Register Description .. 660 Nano100 March 31, 2016 Page 6 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Digital to Analog Converter (DAC) .. 679 Overview .. 679 Features .. 679 Block Diagram .. 680 Functional Description .. 680 Registers and Memory 685 Register Description .. 686 6 APPLICATION CIRCUIT .. 691 LCD Charge Pump .. 691 C-type 1/3 Bias .. 691 C-type 1/2 Bias .. 691 Internal R-type .. 691 External R-type .. 692 ADC Application Circuit .. 693 Voltage Reference Source .. 693 DAC Application Circuit .. 695 Voltage Reference Source .. 695 Whole Chip Application Circuit .. 697 7 POWER COMSUMPTION .. 698 8 ELECTRICAL CHARACTERISTIC .. 699 Absolute Maximum 699 Nano100/Nano110/Nano120/Nano130 DC Electrical Characteristics .. 700 AC Electrical Characteristics .. 706 External Input Clock.
8 706 External 4~24 MHz XTAL Oscillator .. 706 External kHz Crystal .. 707 Internal 12 MHz Oscillator .. 707 Internal 10 kHz Oscillator .. 707 Analog Characteristics .. 708 12-bit ADC .. 708 Brown-out Detector .. 708 Power-on Reset .. 709 Temperature Sensor .. 709 12-bit DAC .. 709 LCD .. 710 Internal Voltage Reference .. 710 USB PHY Specifications .. 711 9 PACKAGE DIMENSIONS .. 713 LQFP128 ( mm footprint mm) .. 713 LQFP64 ( mm footprint mm) .. 714 LQFP64 ( mm footprint mm) .. 715 LQFP48 ( mm footprint mm) .. 717 QFN48 ( mm) .. 718 10 REVISION HISTORY .. 719 Nano100 March 31, 2016 Page 7 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL LIST OF FIGURES Figure 3 1 NuMicroTM Nano100 series Selection Code .. 39 Figure 3 2 NuMicroTM Nano100 LQFP 128-pin Diagram .. 42 Figure 3 3 NuMicroTM Nano100 LQFP 64-pin Diagram .. 43 Figure 3 4 NuMicroTM Nano100 LQFP 48-pin Diagram .. 44 Figure 3 5 NuMicroTM Nano110 LQFP 128-pin Diagram.
9 45 Figure 3 6 NuMicroTM Nano110 LQFP 64-pin Diagram .. 46 Figure 3 7 NuMicroTM Nano120 LQFP 128-pin Diagram .. 47 Figure 3 8 NuMicroTM Nano120 LQFP 64-pin Diagram .. 48 Figure 3 9 NuMicroTM Nano120 LQFP 48-pin Diagram .. 49 Figure 3 10 NuMicroTM Nano130 LQFP 128-pin Diagram .. 50 Figure 3 11 NuMicroTM Nano130 LQFP 64-pin Diagram .. 51 Figure 4 1 NuMicroTM Nano100 Block Diagram .. 102 Figure 4 2 NuMicroTM Nano110 Block Diagram .. 103 Figure 4 3 NuMicroTM Nano120 Block Diagram .. 104 Figure 4 4 NuMicroTM Nano130 Block Diagram .. 105 Figure 5 1 M0 Functional Block .. 106 Figure 5 2 Power Modes .. 144 Figure 5 3 Clock Controller Block Diagram .. 222 Figure 5 4 Clock Sources of Frequency Divider .. 224 Figure 5 5 Frequency Divider Block Diagram .. 224 Figure 5 6 Block Diagram of Flash Memory Controller .. 249 Figure 5 7 Flash Memory Organization .. 251 Figure 5 8 Flash Memory Mapping of CBS in CONFIG0 .. 252 Figure 5 9 32/64/123KB Flash Memory Structure .. 253 Figure 5 10 CPU Halt during ISP Operation.
10 257 Figure 5 11 ISP Operation Flow .. 258 Figure 5 12 EBI Block Diagram .. 271 Figure 5 13 Connection of 16-bit EBI Data Width 16-bit Device .. 271 Figure 5 14 Connection of 8-bit EBI Data Width with 8-bit Device .. 272 Figure 5 15 Timing Control Waveform for 16-bit Data Width .. 273 Figure 5 16 Timing Control Waveform for 8-bit Data Width .. 274 Figure 5 17 Timing Control Waveform for Insert Idle Cycle .. 275 Figure 5 18 GPIO Block Diagram .. 279 Nano100 March 31, 2016 Page 8 of 721 Revision numicro NANO100 series TECHNICAL REFERENCE MANUAL Figure 5 19 Push-Pull Output .. 280 Figure 5 20 Open-Drain Output .. 280 Figure 5 21 DMA Controller Block Diagram .. 305 Figure 5 22 DMA Clock Control Diagram .. 305 Figure 5 23 CRC Generator Block Diagram .. 306 Figure 5 24 VDMA Block Transfer .. 307 Figure 5 25 Timer Controller Block Diagram .. 355 Figure 5 26 Timer Clock Controller Diagram .. 355 Figure 5 27 Timer Clock Controller Diagram .. 357 Figure 5 28 Inter-Timer Trigger Mode .. 359 Figure 5 29 PWM0 Clock.