PIC24FJ64GB004 Family Data Sheet - Microchip Technology

1 2010 Microchip Technology FamilyData Sheet28/44-Pin, 16-Bit,Flash Microcontrollerswith USB On-The-Go (OTG)and nanoWatt XLP TechnologyDS39940D-page 2 2010 Microchip Technology contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use.

2 Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PIC32 logo, rfPIC and UNI/O are registered trademarks of Microchip Technology Incorporated in the and other , Hampshire, HI-TECH C, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the Age, Application Maestro, CodeGuard, dsPICDEM, , dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM.

3 PICkit, PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the and other is a service mark of Microchip Technology Incorporated in the other trademarks mentioned herein are property of their respective companies. 2010, Microchip Technology Incorporated, Printed in the , All Rights Reserved. Printed on recycled : 978-1-60932-439-1 Note the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip data Sheet . Microchip believes that its Family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.

4 There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip s data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip s code protection feature may be a violation of the Digital Millennium Copyright Act.

5 If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company s quality system processes and procedures are for its PIC MCUs and dsPIC DSCs, KEELOQ code hopping devices, serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 2010 Microchip Technology 3 PIC24FJ64GB004 FAMILYU niversal serial Bus Features: USB On-The-Go (OTG) Compliant Dual Role Capable can act as either Host or Peripheral Low-Speed ( Mb/s) and Full-Speed (12 Mb/s) USB Operation in Host mode Full-Speed USB Operation in Device mode High-Precision PLL for USB Accuracy using Internal Oscillator No External Crystal Required Internal Voltage Boost Assist for USB Bus Voltage Generation Interface for Off-Chip Charge Pump for USB Bus Voltage Generation Supports up to 32 Endpoints (16 bidirectional).

6 - USB module can use any RAM location on the device as USB endpoint buffers On-Chip USB Transceiver Interface for Off-Chip USB Transceiver Supports Control, Interrupt, Isochronous and Bulk Transfers On-Chip Pull-up and Pull-Down ResistorsHigh-Performance CPU: Modified Harvard Architecture Up to 16 MIPS Operation @ 32 MHz 8 MHz Internal Oscillator with Typical Accuracy:- 96 MHz PLL- Multiple divide options 17-Bit x 17-Bit Single-Cycle Hardware Fractional/integer Multiplier 32-Bit by 16-Bit Hardware Divider 16 x 16-Bit Working Register Array C Compiler Optimized Instruction Set Architecture:- 76 base instructions- Flexible addressing modes Linear Program Memory Addressing up to 12 Mbytes Linear data Memory Addressing up to 64 Kbytes Two Address Generation Units for Separate Read and Write Addressing of data MemoryPower Management Modes: Selectable Power Management modes with nanoWatt XLP Technology for Extremely Low Power.

7 - Deep Sleep mode allows near total power-down (20 nA typical and 500 nA with RTCC or WDT), along with the ability to wake-up on external triggers or self-wake on programmable WDT or RTCC alarm- Extreme low-power DSBOR for Deep Sleep, LPBOR for all other modes- Sleep mode shuts down peripherals and core for substantial power reduction, fast wake-up- Idle mode shuts down the CPU and peripherals for significant power reduction, down to A typical- Doze mode enables CPU clock to run slower than peripherals- Alternate Clock modes allow on-the-fly switching to a lower clock speed for selective power reduction during Run mode down to 15 A typicalSpecial Microcontroller Features: Operating Voltage Range of to Self-Reprogrammable under Software Control Tolerant Input (digital pins only) High-Current Sink/Source (18 mA/18 mA) on All I/O Pins Flash Program Memory:- 10,000 erase/write cycle endurance (minimum)- 20-year data retention minimum- Selectable write protection boundary Fail-Safe Clock Monitor Operation:- Detects clock failure and switches to on-chip FRC oscillator On-Chip Regulator Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) Two Flexible Watchdog Timers (WDT) for Reliable Operation.

8 - Standard programmable WDT for normal operation- Extreme low-power WDT with programmable period of 2 ms to 26 days for Deep Sleep mode In-Circuit serial Programming (ICSP ) and In-Circuit Debug (ICD) via 2 Pins JTAG Boundary Scan Support PIC24 FJDevicePinsProgram Memory(Bytes)SRAM(Bytes)Remappable PeripheralsI2C 10-Bit A/D(ch)ComparatorsPMP/PSPRTCCCTMUUSB OTGR emappable PinsTimers 16-BitCaptureInputCompare/PWMO utputUART w/IrDA SPI32GB0022832K8K1555522293 YYYY64GB0022864K8K1555522293 YYYY32GB0044432K8K25555222133 YYYY64GB0044464K8K25555222133 YYYY28/44-Pin, 16-Bit, Flash Microcontrollers with USB On-The-Go (OTG) and nanoWatt XLP TechnologyPIC24FJ64GB004 FAMILYDS39940D-page 4 2010 Microchip Technology Features: 10-Bit, up to 13-Channel Analog-to-Digital (A/D) Converter:- 500 ksps conversion rate- Conversion available during Sleep and Idle Three Analog Comparators with Programmable Input/Output Configuration Charge Time Measurement Unit (CTMU):- Supports capacitive touch sensing for touch screens and capacitive switches- Provides high-resolution time measurement and simple temperature sensingPeripheral Features: Peripheral Pin Select:- Allows independent I/O mapping of many peripherals- Up to 25 available pins (44-pin devices)- Continuous hardware integrity checking and safety interlocks prevent unintentional configuration changes 8-Bit Parallel Master Port (PMP/PSP).

9 - Up to 16-bit multiplexed addressing, with up to 11 dedicated address pins on 44-pin devices- Programmable polarity on control lines- Supports legacy Parallel Slave Port Hardware Real-Time Clock/Calendar (RTCC):- Provides clock, calendar and alarm functions- Functions even in Deep Sleep mode Two 3-Wire/4-Wire SPI modules (support 4 Frame modes) with 8-Level FIFO Buffer Two I2C modules support Multi-Master/Slave mode and 7-Bit/10-Bit Addressing Two UART modules:- Supports RS-485, RS-232 and LIN/J2602- On-chip hardware encoder/decoder for IrDA - Auto-wake-up on Start bit- Auto-Baud Detect (ABD)- 4-level deep FIFO buffer Five 16-Bit Timers/Counters with Programmable Prescaler Five 16-Bit Capture Inputs, each with a Dedicated Time Base Five 16-Bit Compare/PWM Outputs, each with a Dedicated Time Base Programmable, 32-Bit Cyclic Redundancy Check (CRC) Generator Configurable Open-Drain Outputs on Digital I/O Pins Up to 3 External Interrupt SourcesPin Diagrams28-Pin SPDIP, SOIC, SSOP(1)Legend:RPn represents remappable peripheral 1:Gray shading indicates tolerant input.

10 Alternative multiplexing for SDA1 and SCL1 when the I2C1 SEL bit is +/ASDA1(2)/RP5/PMD7/CTED1/VBUSVLD/VCMPST 1/CN2/RA0 PGEC3/AN1/C3 IND/VREF-/ASCL1(2)/RP6/PMD6/CTED2/SESSVL D/VCMPST2/CN3/RA1 VDDVSSPGED1/AN2/C2 INB/DPH/RP0/PMD0/CN4/RB0 VBUSSOSCO/SCLKI/T1CK/C2 INC/PMA1/CN0/RA4 SOSCI/C2 IND/RP4/PMBE/CN1/RB4 DISVREGOSCO/CLKO/PMA0/CN29/RA3 OSCI/CLKI/C1 IND/PMCS1/CN30/RA2 VCAP/VDDCORETDI/RP7/PMD5/INT0/CN23/RB7 TDO/SDA1/RP9/PMD3/RCV/CN21/RB9 TCK/USBOEN/SCL1/RP8/PMD4/CN22/RB8AN5/C1 INA/DMLN/RTCC/SCL2/RP3/PMWR/CN7/RB3AN4/C 1 INB/DPLN/SDA2/RP2/PMD2/CN6/RB2 PGEC1/AN3/C2 INA/DMH/RP1/PMD1/CN5/RB11234567891011121 3142827262524232221201918171615AN9/C3 INA/VBUSCHG/RP15/VBUSST/CN11/RB15AN10/C3 INB/CVREF/VCPCON/VBUSON/RP14/CN12/RB14AN 11/C1 INC/RP13/PMRD/REFO/SESSEND/CN13/RB13 VUSBPGED2/D+/VPIO/RP10/CN16/RB10 PGEC2/D-/VMIO/RP11/CN15/RB11 TMS/USBID/CN27/RB5 2010 Microchip Technology 5 PIC24FJ64GB004 FAMILYPin Diagrams28-Pin QFN(1,3)Legend.