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RM0016 Reference manual - st.com

October 2017 DocID14587 Rev 141/4671RM0016 Reference manualSTM8S Series and STM8AF Series 8-bit microcontrollers IntroductionThis Reference manual provides complete information for application developers on how to use STM8S Series and STM8AF Series microcontroller memory and peripherals. The STM8AF Series of microcontrollers is designed for automotive applications, with different memory densities, packages and peripherals: The low-density STM8AF devices are the STM8AF6223/26 with 8 Kbytes of Flash memory. The medium-density STM8AF devices are the STM8AF624x and STM8AF6266/68 microcontrollers with 16 to 32 Kbytes of Flash memory.

October 2017 DocID14587 Rev 14 1/467 1 RM0016 Reference manual STM8S Series and STM8AF Series 8-bit microcontrollers Introduction This reference manual provides complete information for application developers on how to

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Transcription of RM0016 Reference manual - st.com

1 October 2017 DocID14587 Rev 141/4671RM0016 Reference manualSTM8S Series and STM8AF Series 8-bit microcontrollers IntroductionThis Reference manual provides complete information for application developers on how to use STM8S Series and STM8AF Series microcontroller memory and peripherals. The STM8AF Series of microcontrollers is designed for automotive applications, with different memory densities, packages and peripherals: The low-density STM8AF devices are the STM8AF6223/26 with 8 Kbytes of Flash memory. The medium-density STM8AF devices are the STM8AF624x and STM8AF6266/68 microcontrollers with 16 to 32 Kbytes of Flash memory.

2 The high-density STM8AF devices are the STM8AF52xx and STM8AF6269/8x/Ax microcontrollers with 32 to 128 Kbytes of Flash memory. The STM8S Series of microcontrollers is designed for general purpose applications, with different memory densities, packages and peripherals. The value-line low-density STM8S devices are the STM8S001xx/STM8S003xx microcontrollers with 8 Kbytes of Flash memory. The value-line medium-density STM8S devices are the STM8S005xx microcontrollers with 32 Kbytes of Flash memory. The value-line high-density STM8S devices are the STM8S007xx microcontrollers with 64 Kbytes of Flash memory. The access-line low-density STM8S devices are the STM8S103xx and STM8S903xx microcontrollers with 8 Kbytes of Flash memory.

3 The access-line medium-density STM8S devices are the STM8S105xx microcontrollers with 16 to 32 Kbytes of Flash memory. The performance-line high-density STM8S devices are the STM8S207xx and STM8S208xx microcontrollers with 32 to 128 Kbytes of Flash memory. Refer to the product datasheet for ordering information, pin description, mechanical and electrical device characteristics, and for the complete list of available documents For information on programming, erasing and protection of the internal Flash memory please refer to the STM8S Series and STM8AF Series Flash programming manual (PM0051), and to the STM8 SWIM communication protocol and debug module user manual (UM0470).

4 For information on the STM8 core, refer to STM8 CPU programming manual (PM0044). The bootloader user manual (UM0560) describes the usage of the integrated ROM Rev 14 Contents1 Central processing unit (CPU) .. introduction .. registers .. of CPU registers .. CPU register map .. configuration register (CFG_GCR) .. level .. disable .. of global configuration register (CFG_GCR) .. configuration register map and reset values .. 282 Boot ROM .. 293 Memory and register map .. layout .. map .. handling .. description abbreviations .. 334 Flash program memory and data EEPROM .. and EEPROM introduction.

5 And EEPROM glossary .. Flash memory features .. organization .. and STM8AF memory organization .. access/ wait state configuration .. boot area (UBC) .. EEPROM (DATA) .. program area .. bytes .. protection .. protection .. access security system (MASS) .. 44 DocID14587 Rev 143 write access to option bytes .. programming .. (RWW) .. programming .. programming .. programming .. byte programming .. (in-circuit programming) and IAP (in-application programming) .. registers .. control register 1 (FLASH_CR1) .. control register 2 (FLASH_CR2) .. complementary control register 2 (FLASH_NCR2).

6 Protection register (FLASH_FPR) .. protection register (FLASH_NFPR) .. program memory unprotecting key register (FLASH_PUKR) .. EEPROM unprotection key register (FLASH_DUKR) .. status register (FLASH_IAPSR) .. register map and reset values .. 565 Single wire interface module (SWIM) and debug module (DM) .. and DM introduction .. main features .. modes .. 576 Interrupt controller (ITC) .. introduction .. masking and processing flow .. pending interrupts .. sources .. and low power modes .. level/low power mode control .. and nested interrupt management .. interrupt management mode.

7 Interrupt management mode .. interrupts .. instructions .. 66 ContentsRM00164/467 DocID14587 Rev mapping .. and EXTI registers .. condition code register interrupt bits (CCR) .. priority register x (ITC_SPRx) .. interrupt control register 1 (EXTI_CR1) .. interrupt control register 1 (EXTI_CR2) .. and EXTI register map and reset values .. 727 Power supply .. 738 Reset (RST) .. Reset state and under reset definitions .. circuit description .. reset sources .. reset (POR) and brown-out reset (BOR) .. reset .. reset .. reset .. opcode reset .. reset .. register description.

8 Status register (RST_SR) .. register map .. 779 Clock control (CLK) .. clock sources .. (high-speed external) clock signal .. (high-speed internal) clock signal .. clock switching .. startup .. clock switching procedures .. clock selection .. clock-divider .. clock-gating (PCG) .. security system (CSS) .. 88 DocID14587 Rev 145 capability (CCO) .. interrupts .. register description .. clock register (CLK_ICKR) .. clock register (CLK_ECKR) .. master status register (CLK_CMSR) .. master switch register (CLK_SWR) .. control register (CLK_SWCR) .. divider register (CLK_CKDIVR).

9 Clock gating register 1 (CLK_PCKENR1) .. clock gating register 2 (CLK_PCKENR2) .. security system register (CLK_CSSR) .. clock output register (CLK_CCOR) .. clock calibration trimming register (CLK_HSITRIMR) .. clock control register (CLK_SWIMCCR) .. register map and reset values .. 10010 Power management .. considerations .. management for low consumption .. power modes .. mode .. mode .. modes .. analog power controls .. Flash wakeup from Halt mode .. low Flash consumption in Active-halt mode .. 10411 General purpose I/O ports (GPIO) .. main features .. configuration and usage.

10 Modes .. modes .. configuration .. I/O pins .. 108 ContentsRM00166/467 DocID14587 Rev power modes .. mode details .. function input .. capability .. channels .. trigger .. function .. mode details .. function output .. control .. registers .. x output data register (Px_ODR) .. x pin input register (Px_IDR) .. x data direction register (Px_DDR) .. x control register 1 (Px_CR1) .. x control register 2 (Px_CR2) .. register map and reset values .. 11312 Auto-wakeup (AWU) .. introduction .. clock measurement .. functional description .. operation.


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