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Semiconductor Packaging Assembly Technology

Semiconductor , Packaging , Assembly Semiconductor Packaging Assembly Technology Literature Number: SNOA286. Semiconductor Packaging Assembly Technology August 1999. Semiconductor Packaging Assembly Technology Introduction This chapter describes the fundamentals of the processes New Technology Introduction And used by National Semiconductor to assemble IC devices in electronic packages. Electronic Packaging provides the in- Verification terconnection from the IC to the printed circuit board (PCB). Before implementing a new Technology , either a material or Another function is to provide the desired mechanical and an Assembly Technology , National Semiconductor utilizes a environmental protection to ensure reliability and perfor- rigorous system to characterize and verify the suitability of mance.

Semiconductor Packaging Assembly Technology Introduction This chapter describes the fundamentals of the processes used by National Semiconductor to assemble IC …

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Transcription of Semiconductor Packaging Assembly Technology

1 Semiconductor , Packaging , Assembly Semiconductor Packaging Assembly Technology Literature Number: SNOA286. Semiconductor Packaging Assembly Technology August 1999. Semiconductor Packaging Assembly Technology Introduction This chapter describes the fundamentals of the processes New Technology Introduction And used by National Semiconductor to assemble IC devices in electronic packages. Electronic Packaging provides the in- Verification terconnection from the IC to the printed circuit board (PCB). Before implementing a new Technology , either a material or Another function is to provide the desired mechanical and an Assembly Technology , National Semiconductor utilizes a environmental protection to ensure reliability and perfor- rigorous system to characterize and verify the suitability of mance.

2 Three fundamental Assembly flow processes (Table the change for high-volume production. 1) are covered in this chapter: 1) plastic leadframe-based 1. Feasibility packages, 2) plastic ball grid array (PBGA), and 3) hermetic packages. A preliminary analysis of the process or material is con- ducted to determine the feasibility of introducing a new or changing a material/process Technology . This analy- TABLE 1. Assembly Flow Processes for Electronic sis includes a benchmark assessment of available and Packages competing technologies. Plastic 2. Prototypes Plastic (BGA) Hermetic (Leadframe) Prototype parts are assembled to provide an initial sample size for analysis.

3 Wafer Sort Wafer Sort Wafer Sort 3. Assembly 2nd 2nd Optical 2nd Optical Parts are assembled in production equipment to further Optical verify the Technology change. Wafer Wafer Mount Wafer Mount 4. Testing Mount Assembled devices are put through testing to ensure the Wafer Wafer Sawing Wafer Sawing integrity of the Technology . Sawing 5. Process Characterization Die Attach Die Attach Die Attach A full process characterization is conducted to determine Wire Bond Wire Bond Wire Bond the readiness of the new Technology for high-volume 3rd manufacturing. This step utilizes design of experiment 3rd Optical 3rd Optical (DOE) methodologies.

4 Optical Encapsulate (Mold 6. Manufacturing Verification Encapsulate Compound or Glob Lid Seal Production lots are assembled and put through the re- (Mold Compound) quired qualification test to determine package reliability. Top). Ball Attach and Leakage 7. Production Dejunk Reflow Test After successfully completing the previous steps, the Deflash Singulate Technology is released for full production. Marking Ball Inspection Die Preparation Plating Marking Die preparation is common to all three types of process Trim and Form flows. Final Inspection First wafers are sorted at the Assembly site and stored in a The fundamental package Assembly processes for lead- die bank.

5 A 2nd optical visual inspection is conducted to in- frame and hermetic Packaging have remained relatively un- spect for defects before the wafers are released for produc- changed over the past 30 years, though the equipment and tion. materials have undergone considerable advancement. As- Next wafers are mounted on a backing tape that adheres to sembly equipment is no longer as labor intensive. Process- the back of the wafer. The backing/mounting tape provides ing is typically carried out on automated equipment designed support for handling during wafer saw and the die attach pro- and manufactured for high-volume production.

6 Materials are cess. of higher purity and have properties tailored for a specific ap- The wafer saw process cuts the individual die from the wafer plication. leaving the die on the backing tape. The wafer saw equip- ment consists of automated handling equipment, saw blade, and an image recognition system. The image recognition system maps the wafer surface to identify the areas to be cut, known as the saw street. DI Water is dispensed on the wafer during the saw process to wash away particles (Si 2000 National Semiconductor Corporation MS011800 Semiconductor Packaging Assembly Technology Die Preparation (Continued) Quality The coverage of the material dispensed during the die attach Dust) and to provide lubrication during the dicing process.

7 Process is critical to the reliability and performance of the Wafers are dried by spinning the wafer at a high RPM before package. The presence of voids and variations in thickness going to the die attach process. are undesirable. Excessive or insufficient coverage of the die attach material makes the device susceptible to reliability Plastic Leadframe-Based Packages failures. The adhesion strength of the die attach is weakened DIE ATTACH by the presence of voids, particularly during temperature cycle excursions, and can impact the ability of the die attach Die attach provides the mechanical support between the sili- material to dissipate heat away from the device.

8 Lack of con die and the substrate, ,. leadframe, plastic or ceramic thickness control can contribute to reliability failures and im- substrate. The die attach is also critical to the thermal and, pact the subsequent wire bond process. Typical Bond line for some applications, the electrical performance of the de- thickness is between 1 to 2 mils. vice. WIRE BOND. Equipment Wire bonds are the most common means of providing an The die attach equipment is configured to handle the incom- electrical connection from the IC device to the substrate/. ing wafer and substrate simultaneously.

9 An image recogni- Leadframe. The wire bond process must achieve high tion system identifies individual die to be removed from the throughputs and production yields to be acceptable on a cost wafer backing/Mounting tape, while die attach material is basis. High-speed wire bond equipment consists of a han- dispensed in controled amounts on to the substrate. A non dling system to feed the substrate/leadframe into the work pierce through plunge up needle/s assists to separate an in- area. Image recognition systems ensure the die is orientated dividual die to be picked by the collet on the pick-up head of to match the bonding diagram for a particular device.

10 Wires the die attacher. Finally, the die is aligned in the proper orien- are bonded one wire at a time. tation and position on the substrate. Process Materials Thermosonic bonding is used with gold and copper wire. The The type of material used for die attach is a function of the wire is fed through a ceramic capillary. A combination of tem- package type and performance requirements. Table 2 lists perature and ultrasonic energy forms the metallic wire bond. general materials for the various package types. For each interconnection two wire bonds are formed, one at the die and the other at the leadframe/substrate.


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