Single/Dual Digital Potentiometer with SPI Interface

1 2003 Microchip Technology 1 MMCP41 XXX/42 XXXF eatures 256 taps for each Potentiometer Potentiometer values for 10 k , 50 k and 100 k Single and dual versions SPI serial Interface (mode 0,0 and 1,1) 1 LSB max INL & DNL Low power CMOS technology 1 A maximum supply current in static operation Multiple devices can be daisy-chained together (MCP42 XXX only) Shutdown feature open circuits of all resistors for maximum power savings Hardware shutdown pin available on MCP42 XXX only Single supply operation ( - ) Industrial temperature range: -40 C to +85 C Extended temperature range: -40 C to +125 CBlock DiagramDescriptionThe MCP41 XXX and MCP42 XXX devices are 256-position, Digital potentiometers available in 10 k ,50 k and 100 k resistance versions. TheMCP41 XXX is a single-channel device and is offered inan 8-pin PDIP or SOIC package.

2 The MCP42 XXX con-tains two independent channels in a 14-pin PDIP, SOICor TSSOP package. The wiper position of theMCP41 XXX/42 XXX varies linearly and is controlled viaan industry-standard SPI Interface . The devices con-sume <1 A during static operation. A software shut-down feature is provided that disconnects the A terminal from the resistor stack and simultaneously con-nects the wiper to the B terminal. In addition, the dualMCP42 XXX has a SHDN pin that performs the samefunction in hardware. During shutdown mode, the con-tents of the wiper register can be changed and thepotentiometer returns from shutdown to the new wiper is reset to the mid-scale position (80h) uponpower-up. The RS (reset) pin implements a hardwarereset and also returns the wiper to mid-scale. TheMCP42 XXX SPI Interface includes both the SI and SOpins, allowing daisy-chaining of multiple devices.

3 Chan-nel-to-channel resistance matching on the MCP42 XXXvaries by less than 1%. These devices operate from asingle - supply and are specified over theextended and industrial temperature Types 16-BitShiftVDDVSSSISCKRSSHDNPB1PA1PW1 Resistor Array 1* Wiper RegisterPB0PW0PA0 Resistor Array 0 Wiper RegisterRegisterS0 Control LogicCS* Potentiometer P1 is only available on the dualMCP42 XXX Digital Potentiometer with SPI InterfaceMCP41 XXX/42 XXXDS11195C-page 2 2003 Microchip Technology CHARACTERISTICSDC CHARACTERISTICS: 10 k VERSIONE lectrical Characteristics: Unless otherwise indicated, VDD = + to , TA = -40 C to +85 C (TSSOP devices are only specified at +25 C and +85 C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25 ModeNominal ResistanceR81012k TA = +25 C (Note 1)Rheostat Differential Non LinearityR-DNL-1 1/4+1 LSBNote 2 Rheostat Integral Non LinearityR-INL-1 1/4+1 LSBNote 2 Rheostat Tempco RAB/ T 800 ppm/ CWiper ResistanceRW 52100 VDD = , IW = 1 mA, code 00hRW 73125 VDD = , IW = 1 mA, code 00hWiper CurrentIW-1 +1mANominal resistance Match R/R only, P0 to P1.

4 TA = +25 CPotentiometer DividerResolutionN8 BitsMonotonicityN8 BitsDifferential Non-LinearityDNL-1 1/4+1 LSBNote 3 Integral Non-LinearityINL-1 1/4+1 LSBNote 3 Voltage Divider Tempco VW/ T 1 ppm/ C Code 80hFull Scale FFh, VDD = 5V, see Figure FFh, VDD = 3V, see Figure 2-25 Zero Scale ErrorVWZSE0+ +2 LSBCode 00h, VDD = 5V, see Figure 2-25 VWZSE0+ +2 LSBCode 00h, VDD = 3V, see Figure 2-25 Resistor TerminalsVoltage RangeVA,B,W0 VDDNote 4 Capacitance (CA or CB) 15 pFf = 1 MHz, Code = 80h, see Figure 2-30 CapacitanceCW pFf = 1 MHz, Code = 80h, see Figure 2-30 Dynamic Characteristics (All dynamic characteristics use VDD = 5V)Bandwidth -3dBBW 1 MHzVB = 0V, Measured at Code 80h,Output Load = 30 PFSettling TimetS 2 SVA = VDD,VB = 0V, 1% Error Band, Transition from Code 00h to Code 80h, Output Load = 30 pFResistor Noise VoltageeNWB 9 nV/ HzVA = Open, Code 80h, f =1 kHzCrosstalkCT -95 dBVA = VDD, VB = 0V (Note 5) Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operationSchmitt Trigger High-Level Input VSchmitt Trigger Low-Level Input Voltage VIL of Schmitt Trigger InputsVHYS Low-Level Output VoltageVOL = mA, VDD = 5 VHigh-Level Output VoltageVOHVDD - VIOH = -400 A, VDD = 5 VInput Leakage CurrentILI-1 +1 ACS = VDD, VIN = VSS or VDD, includes VA SHDN=0 Pin Capacitance (All inputs/outputs)

5 CIN, COUT 10 pFVDD = , TA = +25 C, fc = 1 MHzPower RequirementsOperating Voltage Current, ActiveIDDA 340500 AVDD = , CS = VSS, fSCK = 10 MHz,SO = Open, Code FFh (Note 6) Supply Current, Static IDDS 1 ACS, SHDN, RS = VDD = , SO = Open (Note 6)Power Supply SensitivityPSS = - , VA = , Code 80hPSS = - , VA = , Code 80hNote1:VAB = VDD, no connection on :Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = 50 A for VDD = 3V and IW = 400 A for VDD = 5V for 10 k version. See Figure 2-26 for test :INL and DNL are measured at VW with the device configured in the voltage divider or Potentiometer mode. VA = VDD and VB = 0V. DNL specification limits of 1 LSB max are specified monotonic operating conditions.

6 See Figure 2-25 for test :Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured using Figure :Measured at VW pin where the voltage on the adjacent VW pin is swinging :Supply current is independent of current through the potentiometers. 2003 Microchip Technology 3 MCP41 XXX/42 XXXDC CHARACTERISTICS: 50 k VERSIONE lectrical Characteristics: Unless otherwise indicated, VDD = + to , TA = -40 C to +85 C (TSSOP devices are only specified at +25 C and +85 C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25 ModeNominal ResistanceR355065k TA = +25 C (Note 1)Rheostat Differential Non-LinearityR-DNL-1 1/4+1 LSBNote 2 Rheostat Integral Non-LinearityR-INL-1 1/4+1 LSBNote 2 Rheostat Tempco RAB/ T 800 ppm/ CWiper ResistanceRW 125175 VDD = , IW = 1 mA, code 00hRW 175250 VDD = , IW = 1 mA, code 00hWiper CurrentIW-1 +1mANominal resistance Match R/R only, P0 to P1.

7 TA = +25 CPotentiometer DividerResolutionN8 BitsMonotonicityN8 BitsDifferential Non-LinearityDNL-1 1/4+1 LSBNote 3 Integral Non-LinearityINL-1 1/4+1 LSBNote 3 Voltage Divider Tempco VW/ T 1 ppm/ C Code 80hFull-Scale FFh, VDD = 5V, see Figure FFh, VDD = 3V, see Figure 2-25 Zero-Scale ErrorVWZSE0+ +1 LSBCode 00h, VDD = 5V, see Figure 2-25 VWZSE0+ +1 LSBCode 00h, VDD = 3V, see Figure 2-25 Resistor TerminalsVoltage RangeVA,B,W0 VDDNote 4 Capacitance (CA or CB) 11 pFf =1 MHz, Code = 80h, see Figure 2-30 CapacitanceCW pFf =1 MHz, Code = 80h, see Figure 2-30 Dynamic Characteristics (All dynamic characteristics use VDD = 5V)Bandwidth -3dBBW 280 MHzVB = 0V, Measured at Code 80h,Output Load = 30 PFSettling TimetS 8 SVA = VDD,VB = 0V, 1% Error Band, Transition from Code 00h to Code 80h, Output Load = 30 pFResistor Noise VoltageeNWB 20 nV/ HzVA = Open, Code 80h, f =1 kHzCrosstalkCT -95 dBVA = VDD, VB = 0V (Note 5) Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin Trigger High-Level Input VSchmitt Trigger Low-Level Input VoltageVIL of Schmitt Trigger InputsVHYS Low-Level Output VoltageVOL = mA, VDD = 5 VHigh-Level Output VoltageVOHVDD - VIOH = -400 A, VDD = 5 VInput Leakage CurrentILI-1 +1 ACS = VDD, VIN = VSS or VDD, includes VA SHDN=0 Pin Capacitance (All inputs/outputs)

8 CIN, COUT 10 pFVDD = , TA = +25 C, fc = 1 MHzPower RequirementsOperating Voltage Current, ActiveIDDA 340500 AVDD = , CS = VSS, fSCK = 10 MHz, SO = Open, Code FFh (Note 6) Supply Current, Static IDDS 1 ACS, SHDN, RS = VDD = , SO = Open (Note 6)Power Supply SensitivityPSS = - , VA = , Code 80hPSS = - , VA = , Code 80hNote1:VAB = VDD, no connection on :Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. IW = VDD/R for +3V or +5V for 50 k version. See Figure 2-26 for test :INL and DNL are measured at VW with the device configured in the voltage divider or Potentiometer mode. VA = VDD and VB = 0V. DNL specification limits of 1 LSB max are specified monotonic operating conditions.

9 See Figure 2-25 for test :Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured using Figure :Measured at VW pin where the voltage on the adjacent VW pin is swinging full :Supply current is independent of current through the 4 2003 Microchip Technology CHARACTERISTICS: 100 k VERSIONE lectrical Characteristics: Unless otherwise indicated, VDD = + to , TA = -40 C to +85 C (TSSOP devices are only specified at +25 C and +85 C). Typical specifications represent values for VDD = 5V, VSS = 0V, VB = 0V, TA = +25 ModeNominal ResistanceR70100130k TA = +25 C (Note 1)Rheostat Differential Non-LinearityR-DNL-1 1/4+1 LSBNote 2 Rheostat Integral Non-LinearityR-INL-1 1/4+1 LSBNote 2 Rheostat Tempco RAB/ T 800 ppm/ CWiper ResistanceRW 125175 VDD = , IW = 1 mA, code 00hRW 175250 VDD = , IW = 1 mA, code 00hWiper CurrentIW-1 +1mANominal resistance Match R/R only, P0 to P1.

10 TA = +25 CPotentiometer DividerResolutionN8 BitsMonotonicityN8 BitsDifferential Non-LinearityDNL-1 1/4+1 LSBNote 3 Integral Non-LinearityINL-1 1/4+1 LSBNote 3 Voltage Divider Tempco VW/ T 1 ppm/ C Code 80hFull-Scale FFh, VDD = 5V, see Figure FFh, VDD = 3V, see Figure 2-25 Zero-Scale ErrorVWZSE0+ +1 LSBCode 00h, VDD = 5V, see Figure 2-25 VWZSE0+ +1 LSBCode 00h, VDD = 3V, see Figure 2-25 Resistor TerminalsVoltage RangeVA,B,W0 VDDNote 4 Capacitance (CA or CB) 11 pFf =1 MHz, Code = 80h, see Figure 2-30 CapacitanceCW pFf =1 MHz, Code = 80h, see Figure 2-30 Dynamic Characteristics (All dynamic characteristics use VDD = 5V.)Bandwidth -3dBBW 145 MHzVB = 0V, Measured at Code 80h,Output Load = 30 PFSettling TimetS 18 SVA = VDD,VB = 0V, 1% Error Band, Transition from Code 00h to Code 80h, Output Load = 30 pFResistor Noise VoltageeNWB 29 nV/ HzVA = Open, Code 80h, f =1 kHzCrosstalkCT -95 dBVA = VDD, VB = 0V (Note 5) Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin Trigger High-Level Input VSchmitt Trigger Low-Level Input VoltageVIL of Schmitt Trigger InputsVHYS Low-Level Output VoltageVOL = mA, VDD = 5 VHigh-Level Output VoltageVOHVDD - VIOH = -400 A, VDD = 5 VInput Leakage CurrentILI-1 +1 ACS = VDD, VIN = VSS or VDD, includes VA SHDN=0 Pin Capacitance (All inputs/outputs)