STM32 microcontroller GPIO hardware settings and low …

1 August 2021AN4899 Rev 21/311AN4899 Application noteSTM32 microcontroller GPIO configuration for hardware settings and low-power consumptionIntroductionThe STM32 microcontroller general-purpose input/output pin (GPIO) provides many ways to interface with external circuits within an application framework. This application note provides basic information about GPIO configurations as well as guidelines for hardware and software developers to optimize the power performance of their STM32 32-bit Arm Cortex MCUs using the GPIO application note must be used in conjunction with the related STM32 reference manual and datasheet available at Rev 2 Contents1 General information .. 62 Documentation conventions .. abbreviations .. 73 GPIO main features .. 74 GPIO functional description.

2 Abbreviations .. equivalent schematics .. modes description .. mode configuration .. mode configuration .. functions .. configuration .. 125 GPIO electrical characteristics and definitions .. general information .. leakage current (Ilkg) .. current (IINJ) .. current consumption .. output and current drive .. calculation .. tolerant and five-volt tolerant .. tolerant GPIO (TT) .. tolerant GPIO (FT) .. tolerant application examples .. LED drive .. drive .. application .. application .. VBUS example .. usage for the five-volt ADC conversion .. 21AN4899 Rev 23/31AN4899 Contents36 GPIO hardware guideline .. floating unused pin .. domains leakage .. protection when no VDD is supplied.

3 Output with no load .. the MCO clock output .. pins have PU or PD by default .. pin cannot be used as enable .. GPIO has limited current strength .. pin .. 267 GPIO software guidelines for power optimization .. unused GPIO input as analog input .. GPIO speed .. GPIO register clock when not in use .. GPIO when entering low-power modes .. exit mode (STM32L4 Series and STM32L4+ Series only) .. 278 GPIO selection guide and configuration .. 289 Revision history .. 30 List of tablesAN48994/31AN4899 Rev 2 List of tablesTable of GPIO structures .. 8 Table revision history .. 30AN4899 Rev 25/31AN4899 List of figures5 List of figuresFigure compliant GPIO structure (TC) .. 9 Figure or five-volt tolerant GPIO structure (TT or FT).

4 10 Figure buffer and current flow .. 15 Figure level compatibility .. 15 Figure current flow according to output voltage level .. 16 Figure of white LED drive connections .. 18 Figure of triac drive connections .. 19 Figure of I2C connections .. 19 Figure of 5 V to V power supply .. 20 Figure of UART connections .. 20 Figure of USB VBUS connections .. 21 Figure of VBUS to VDD power supply .. 21 Figure of five-volt ADC conversion .. 22 Figure example for five-volt ADC conversion .. 22 Figure voltage leakage example .. 23 Figure protection when VDD is not supplied.. 24 Figure output with no load.. 25 Figure configuration flowchart (1 of 2) .. 28 Figure configuration flowchart (2 of 2) .. 29 General informationAN48996/31AN4899 Rev 21 General informationSTM32 microcontrollers are based on the Arm (a) Cortex Documentation GlossaryThis section defines the main acronyms and abbreviations used in this :absolute maximum ratingGPIO:general-purpose input outputGP:general-purposePP:push-pullPU:p ull-upPD:pull-downOD:open-drainAF:altern ate functionVIH:the minimum voltage level that is interpreted as a logical 1 by a digital inputVIL:the maximum voltage level that is interpreted as a logical 0 by a digital inputVOH:the guaranteed minimum voltage level that is provided by a digital output set to the logical 1 valueVOL:the guaranteed maximum voltage level that is provided by a digital output set to the logical 0 valueVDD.

5 External power supply for the I/OsVDDIO2:external power supply for the I/Os, independent from the VDD voltageVDDA:external power supply for analogVSS:groundIIH:input current when input is 1 IIL:input current when input is 0 IOH:output current when output is 1 IOL:output current when output is 0 Ilkg:leakage currentIINJ:injected currenta. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or Rev 27/31AN4899 GPIO main Register abbreviations The following abbreviations are used in register descriptions (x = A to H):GPIOx_MODER:GPIO port mode registerGPIOx_OTYPER:GPIO output type registerGPIOx_OSPEEDR:GPIO output speed registerGPIOx_PUPDR:GPIO port pull-up / pull-down registerGPIOx_IDR:GPIO port input data registerGPIOx_ODR:GPIO port output data registerGPIOx_BSRR:GPIIO port it set / reset registerGPIOx_LCKR:GPIO port configuration lock registerGPIOx_AFRL:GPIO alternate function low registerGPIOx_AFRH:GPIO alternate function high registerGPIOx_ASCR:GPIO port analog switch control register3 GPIO main featuresSTM32 GPIO exhibits the following features.

6 Output states: push-pull, or open drain + pull-up / pull-down according to GPIOx_MODER, GPIOx_OTYPER, and GPIOx_PUPDR registers settings Output data from output data register GPIOx_ODR or peripheral (alternate function output) Speed selection for each I/O (GPIOx_OSPEEDR) Input states: floating, pull-up / pull-down, analog according to GPIOx_MODER, GPIOx_PUPDR and GPIOx_ASCR registers settings Input data to input data register (GPIOx_IDR) or peripheral (alternate function input) Bit set and reset register (GPIOx_ BSRR) for bitwise write access to GPIOx_ODR Locking mechanism (GPIOx_LCKR) provided to freeze the I/O port configurations Analog function selection registers (GPIOx_MODER and GPIOx_ASCR) Alternate function selection registers (GPIOx_MODER, GPIOx_AFRL, and GPIOx_AFRH) Fast toggle capable of changing every two clock cycles Highly flexible pin multiplexing allowing the use of I/O pins as GPIO or as one of several peripheral functionsGPIO functional descriptionAN48998/31AN4899 Rev 24 GPIO functional descriptionSTM32 GPIO can be used in a variety of configurations.

7 Each GPIO pin can be individually configured by software in any of the following modes: Input floating Input pull-up Input-pull-down Analog Output open-drain with pull-up or pull-down capability Output push-pull with pull-up or pull-down capability Alternate function push-pull with pull-up or pull-down capability Alternate function open-drain with pull-up or pull-down GPIO abbreviationsSeveral GPIO structures are available across the range of STM32 devices. Each structure is associated with a list of b l e 1 summarizes the GPIO definitions and abbreviations applicable to STM32 products As an example, the following description refers to a GPIO in a STM32 datasheet:PB1 I/O FT means: pin PB1 I/O: port B bit 1 input / output FT: five-volt tolerantBefore starting a board design, it is important to refer to the datasheet of the STM32 product or to the STM32 CubeMX tool to check for GPIO availability in coherence with the target to the section about software development tools at 1.

8 List of GPIO structures Name AbbreviationDefinitionPin TypeSSupply pinIInput only pinI/OInput / output pinI/O structureFT(1)Five-volt tolerant I/O pinTT(1)Three-volt tolerant I/O pinTCThree-volt capable I/O pin (Standard V I/O)BDedicated boot pinRSTB idirectional reset pin with embedded weak pull-up resistorPin functionsAlternate functions Functions selected through GPIOx_AFR registersAdditional functions Functions directly selected and enabled through peripheral registers1. FT and TT I/Os have options depending on the device. The user must refer to the datasheet for their Rev 29/31AN4899 GPIO functional GPIO equivalent schematicsSTM32 products integrate three main GPIO basic structures: Three-volt compliant (abbreviated as TC). The equivalent GPIO diagram structure is given in Figure 1.

9 Three-volt tolerant (abbreviated as TT). Five-volt tolerant (abbreviated as FT) The equivalent GPIO diagram structure for TT or FT is given in Figure :In Figure 1 and Figure 2, the analog switch in the dotted square is optional. Its presence depends on the STM32 product considered. The analog switch is controlled by enabling analog peripheral on the given pin (not by setting the GPIO in the analog mode). Refer to the product datasheet for Figure 1 and Figure 2, the VDD supply may refer to VDD or VDDIO2 according to the STM32 product considered. Refer to the product datasheet for 1. Three-volt compliant GPIO structure (TC)Note:The parasitic diode in the analog domain is connected to VDDA and cannot be used as a protection voltage level called VDD_FT in some datasheets and reference manuals is inside the ESD protection dataregisterVDDI/O pinVSSVDDO utputcontrolPMOSNMOSA nalogoptionInput bufferOuput bufferon/offon/offVSSA lternate function outputInput dataregisterAlternate function inputVSSA nalog switchAnalog IPAnalogVSSVDDD igitalVDDAP arasitic diodeand resistorRPURPDGPIO functional descriptionAN489910/31AN4899 Rev 2 Figure 2.

10 Three-volt or five-volt tolerant GPIO structure (TT or FT)Note:The parasitic diode in the analog domain is connected to VDDA and cannot be used as a protection voltage level called VDD_FT in some datasheets and reference manuals is inside the ESD protection the analog option is selected (by enabling analog peripheral on the given pin), the FT I/O is not five-volt tolerant anymore since the pin is supplied with :A TT or FT GPIO pin has no internal protection diode connected to supply (VDD). There is no physical limitation against over- voltage . Therefore, for applications requiring a limited voltage threshold, it is recommended to connect an external diode to GPIO modes descriptionThis section describes the possible GPIO pin configurations available in STM32 Input mode configurationWhen a STM32 device I/O pin is configured as input, one of three options must be selected: Input with internal pull-up.