TC1411/TC1411N Data Sheet - Microchip Technology

1 TC1411/TC1411N . 1A High-Speed MOSFET Drivers Features General Description Latch-Up Protected: Will Withstand 500 mA The TC1411/TC1411N are 1A CMOS buffers/drivers. Reverse Current They will not latch up under any conditions within their Input Will Withstand Negative Inputs Up to 5V power and voltage ratings. They are not subject to Electrostatic Discharge (ESD) Protected: kV damage when up to 5V of noise spiking of either (HBM) and 400V (MM) polarity occurs on the ground pin. They can accept, without damage or logic upset, up to 500 mA of current High-Peak Output Current: 1A. of either polarity being forced back into their output. All Wide Input Supply Voltage Operating Range: terminals are fully protected against Electrostatic - to 16V Discharge (ESD) up to kV (HBM) and 400V (MM). High Capacitive Load Drive Capability: As MOSFET drivers, the TC1411/TC1411N can easily - 1000 pF in 25 ns charge a 1000 pF gate capacitance in 25 ns with Short Delay Time: 30 ns typical matched rise and fall times and provide low enough Matched Delay Times impedance in both the ON' and OFF' states to ensure the MOSFET's intended state will not be affected, even Low Supply Current by large transients.

2 The leading and trailing edge - With Logic 1' Input: 500 A propagation delay times are also matched to allow - With Logic 0' Input: 100 A driving short-duration inputs with greater accuracy. Low Output Impedance: 8 . Available in Space-Saving 8-pin MSOP Package Package Types Pinout same as TC1410/TC1412/TC1413. 8-Pin MSOP/PDIP/SOIC. Applications VDD 1 8 VDD VDD 1 8 VDD. Switch Mode Power Supplies IN 2 7 OUT IN 2 7 OUT. tc1411 tc1411n . Pulse Transformer Drive NC 3 6 OUT NC 3 6 OUT. Line Drivers GND 4 5 GND GND 4 5 GND. Relay Driver 2 6,7 2 6,7. Inverting Non-inverting NC = No Internal Connection Note: Duplicate pins must be connected together for proper operation. 2001-2015 Microchip Technology Inc. DS20001390F-page 1. TC1411/TC1411N . Functional Block Diagram VDD. tc1411 . Inverting Outputs 300 mV. Output Non-inverting Input Outputs tc1411n .

3 Effective Input C = 10 pF. GND. DS20001390F-page 2 2001-2015 Microchip Technology Inc. TC1411/TC1411N . ELECTRICAL Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to CHARACTERISTICS the device. These are stress ratings only and functional operation of the device at these or any other conditions Absolute Maximum Ratings above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Supply Voltage .. +20V Maximum Rating conditions for extended periods may Input Voltage .. VDD + to GND affect device reliability. Power Dissipation (TA 70 C). MSOP .. 340 mW. PDIP .. 730 mW. 470 mW. Storage Temperature -65 C to +150 C. Maximum Junction Temperature .. +150 C. DC CHARACTERISTICS. Electrical Specifications: Unless otherwise noted, over the operating temperature range with VDD 16V.

4 Typical values are measured at TA = +25 C, VDD = 16V. Parameters Sym. Min. Typ. Max. Units Conditions Input Logic 1', High Input Voltage VIH V. Logic 0', Low Input Voltage VIL V. Input Current IIN A 0V VIN VDD, TA = +25 C. -10 10 -40 C TA +85 C. Output High Output Voltage VOH VDD V DC Test Low Output Voltage VOL V DC Test Output Resistance RO 8 11 VDD = 16V, IO = 10 mA, TA = +25 C. 10 14 0 C TA +70 C. 10 14 -40 C TA +85 C. Peak Output Current IPK A VDD = 16V. Latch-Up Protection IREV A Duty cycle 2%, t 300 s, Withstand Reverse Current VDD = 16V. Switching Time (Note 1). Rise Time tR 25 35 ns TA = +25 C. 27 40 0 C TA +70 C. 29 40 -40 C TA +85 C, Figure 4-1. Fall Time tF 25 35 ns TA = +25 C. 27 40 0 C TA +70 C. 29 40 -40 C TA +85 C, Figure 4-1. Delay Time tD1 30 40 ns TA = +25 C. 33 45 0 C TA +70 C. 35 45 -40 C TA +85 C, Figure 4-1.

5 Delay Time tD2 30 40 ns TA = +25 C. 33 45 0 C TA +70 C. 35 45 -40 C TA +85 C, Figure 4-1. Note 1: Switching times ensured by design. 2001-2015 Microchip Technology Inc. DS20001390F-page 3. TC1411/TC1411N . DC CHARACTERISTICS (CONTINUED). Electrical Specifications: Unless otherwise noted, over the operating temperature range with VDD 16V. Typical values are measured at TA = +25 C, VDD = 16V. Parameters Sym. Min. Typ. Max. Units Conditions Power Supply Power Supply Current IS mA VIN = 3V, VDD = 16V. VIN = 0V. Note 1: Switching times ensured by design. TEMPERATURE CHARACTERISTICS. Electrical Specifications: Unless otherwise noted, all parameters apply with VDD 16V. Parameters Sym. Min. Typ. Max. Units Conditions Temperature Ranges Specified Temperature Range (C) TA 0 +70 C. Specified Temperature Range (E) TA -40 +85 C. Specified Temperature Range (V) TA -40 +125 C.

6 Maximum Junction Temperature TJ +150 C. Storage Temperature Range TA -65 +150 C. Package Thermal Resistances Thermal Resistance, 8L-MSOP JA 211 C/W. Thermal Resistance, 8L-PDIP JA C/W. Thermal Resistance, 8L-SOIC JA C/W. DS20001390F-page 4 2001-2015 Microchip Technology Inc. TC1411/TC1411N . TYPICAL PERFORMANCE CURVES. Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range ( , outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, over operating temperature range with VDD 16V. 500 500.

7 TA = +25 C VSUPPLY = 16V. VIN = 3V. 400 400. VIN = 3V. ISUPPLY ( A). ISUPPLY ( A). 300 300. 200 200. 100 100 VIN = 0V. VIN = 0V. 0 0. 4 6 8 10 12 14 16 -40 -20 0 20 40 60 80. VDD (V) TEMPERATURE ( C). FIGURE 2-1: Quiescent Supply Current FIGURE 2-4: Quiescent Supply Current vs. Supply Voltage. vs. Temperature. TA = +25 C VSUPPLY = 16V. VIH VIH. VTHRESHOLD (V). VTHRESHOLD (V). VIL VIL. 4 6 8 10 12 14 16 -40 -20 0 20 40 60 80. VDD (V) TEMPERATURE ( C). FIGURE 2-2: Input Threshold vs. Supply FIGURE 2-5: Input Threshold vs. Voltage. Temperature. 25 25. TA = +85 C. 20 20. RDS-ON (Ohms). RDS-ON (Ohms). TA = +25 C. TA = +85 C. 15 15. TA = +25 C. 10 10. TA = -40 C. 5 5. TA = -40 C. 0 4 0. 6 8 10 12 14 16 4 6 8 10 12 14 16. VDD (V) VDD (V). FIGURE 2-3: High-State Output FIGURE 2-6: Low-State Output Resistance vs. Supply Voltage.

8 Resistance vs. Supply Voltage. 2001-2015 Microchip Technology Inc. DS20001390F-page 5. TC1411/TC1411N . Note: Unless otherwise indicated, over operating temperature range with VDD 16V. 100 100. CLOAD = 1000 pF CLOAD = 1000 pF. 80 80. TA = +85 C. tRISE (nsec). tFALL (nsec). 60 60. TA = +85 C. TA = +25 C. 40 40 TA = +25 C. 20 20. TA = -40 C. TA = -40 C. 0 0. 4 6 8 10 12 14 16 4 6 8 10 12 14 16. VDD (V) VDD (V). FIGURE 2-7: Rise Time vs. Supply FIGURE 2-10: Fall Time vs. Supply Voltage. Voltage. 100 100. CLOAD = 1000 pF CLOAD = 1000 pF. 80 80. TA = +85 C. tD1 (nsec). tD2 (nsec). 60 TA = +85 C 60. TA = +25 C TA = +25 C. 40 40. TA = -40 C. TA = -40 C. 20 20. 0 0. 4 6 8 10 12 14 16 4 6 8 10 12 14 16. VDD (V) VDD (V). FIGURE 2-8: Propagation Delay vs. FIGURE 2-11: Propagation Delay vs. Supply Voltage. Supply Voltage. 100 36.

9 TA = +25 C TA = +25 C. VDD = 16V VDD = 16V. 80 34 tD2. Propagation Delays (nsec). tRISE. tRISE, tFALL (nsec). 60 32. 40. tFALL 30 tD1. 20 28. 0 26. 0 500 1000 1500 2000 2500 3000 3500 0 500 1000 1500 2000 2500 3000 3500. CLOAD (pF) CLOAD (pF). FIGURE 2-9: Rise and Fall Times vs. FIGURE 2-12: Propagation Delays vs. Capacitive Load. Capacitive Load. DS20001390F-page 6 2001-2015 Microchip Technology Inc. TC1411/TC1411N . PIN DESCRIPTIONS. The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE. Pin tc1411 tc1411n . Description No. MSOP, PDIP, SOIC MSOP, PDIP, SOIC. 1 VDD VDD Supply input, to 16V. 2 IN IN Control input 3 NC NC No connection 4 GND GND Ground 5 GND GND Ground 6 OUT OUT CMOS push-pull output, common to pin 7. 7 OUT OUT CMOS push-pull output, common to pin 6. 8 VDD VDD Supply input, to 16V.

10 Supply Input (VDD) CMOS Push-pull Output The VDD input is the bias supply for the MOSFET driver (OUT, OUT). and is rated for to 16V with respect to the ground The MOSFET driver output is a low impedance, CMOS. pin. The VDD input should be bypassed to ground with push-pull style output, capable of driving a capacitive a local ceramic capacitor. The value of the capacitor load with 1A peak currents. should be chosen based on the capacitive load that is being driven. A value of F is suggested. Ground (GND). Control Input (IN) The ground pins are the return path for the bias current and for the high-peak currents which discharge the The MOSFET driver input is a high-impedance, load capacitor. The ground pins should be tied into a TTL/CMOS-compatible input. The input has 300 mV of ground plane or have very short traces to the bias hysteresis between the high and low thresholds that supply source return.