TC4420/TC4429 - Microchip Technology

1 2002-2012 Microchip Technology 1TC4420/ tc4429 Features Latch-Up Protected: Will Withstand > Reverse Output Current Logic Input Will Withstand Negative Swing Up To 5V ESD Protected: 4 kV Matched Rise and Fall Times:- 25 ns (2500 pF load) High Peak Output Current: 6A Wide Input Supply Voltage Operating Range:- to 18V High Capacitive Load Drive Capability: 10,000 pF Short Delay Time: 55 ns (typ.) CMOS/TTL Compatible Input Low Supply Current With Logic 1 Input:-450 A (typ.) Low Output Impedance: Output Voltage Swing to Within 25 mV of Ground or VDD Space-Saving 8-Pin SOIC and 8-Pin 6x5 DFN PackagesApplications Switch-Mode Power Supplies Motor Controls Pulse Transformer Driver Class D Switching AmplifiersGeneral DescriptionThe TC4420/TC4429 are 6A (peak), single-outputMOSFET drivers. The tc4429 is an inverting driver(pin-compatible with the TC429), while the tc4420 is anon-inverting driver.

2 These drivers are fabricated inCMOS for lower power and more efficient operationversus bipolar devices have TTL/CMOS compatible inputs thatcan be driven as high as VDD + or as low as 5 Vwithout upset or damage to the device. This eliminatesthe need for external level-shifting circuitry and itsassociated cost and size. The output swing is rail-to-rail,ensuring better drive voltage margin, especially duringpower-up/power-down sequencing. Propagationaldelay time is only 55 ns (typ.) and the output rise and falltimes are only 25 ns (typ.) into 2500 pF across theusable power supply other drivers, the TC4420/TC4429 are virtuallylatch-up proof. They replace three or more discretecomponents, saving PCB area, parts and improvingoverall system Types(1)5-Pin TO-220 VDDGNDINPUTGNDOUTPUTTC4420TC4429Ta b i sCommonto VDD8-Pin CERDIP/1234 VDD5678 OUTPUTGNDVDDINPUTNCGNDOUTPUTTC4420TC4429 tc4420 tc4429 VDDOUTPUTGNDOUTPUTPDIP/SOICNote 1:Duplicate pins must both be connected for proper :Exposed pad of the DFN package is electrically DFN(2)VDDINPUTNCGND23456781TC4420TC4429 VDDOUTPUTGNDOUTPUTTC4420 tc4429 VDDOUTPUTGNDOUTPUT6A High-Speed MOSFET DriversTC4420/TC4429DS21419D-page 2 2002-2012 Microchip Technology Block DiagramEffective InputTC4420 OutputInputGNDVDD300 mV = 38 pF TC4429500 A Non-InvertingInverting 2002-2012 Microchip Technology 3TC4420 CHARACTERISTICSA bsolute Maximum Ratings Supply Voltage.

3 +20 VInput Voltage .. 5V to VDD + Current (VIN > VDD).. 50 mAPower Dissipation (TA 70 C)5-Pin TO-220 .. 800 mWDFN ..Note 2 PDIP .. 730 470 mWPackage Power Dissipation (TA 25 C)5-Pin TO-220 (With Heatsink) .. Impedances (To Case)5-Pin TO-220 R 10 C/W Stresses above those listed under Absolute MaximumRatings may cause permanent damage to the device. Theseare stress ratings only and functional operation of the deviceat these or any other conditions above those indicated in theoperation sections of the specifications is not to Absolute Maximum Rating conditions forextended periods may affect device CHARACTERISTICSE lectrical Specifications: Unless otherwise noted, TA = +25 C with VDD 1 , High Input VLogic 0 , Low Input VoltageVIL Voltage RangeVIN 5 VDD+ CurrentIIN 10 +10 A0V VIN VDDO utputHigh Output VoltageVOHVDD VDC TESTLow Output VoltageVOL TESTO utput Resistance, HighROH IOUT = 10 mA, VDD = 18 VOutput Resistance, LowROL IOUT = 10 mA, VDD = 18 VPeak Output CurrentIPK AVDD = 18 VLatch-Up ProtectionWithstand Reverse CurrentIREV > ADuty cycle 2%, t 300 secSwitching Time (Note 1)Rise TimetR 2535nsFigure 4-1, CL = 2,500 pFFall TimetF 2535nsFigure 4-1, CL = 2,500 pFDelay TimetD1 5575nsFigure 4-1 Delay TimetD2 5575nsFigure 4-1 Power SupplyPower Supply CurrentIS AVIN = 3 VVIN = 0 VOperating Input 18 VNote 1:Switching times ensured by.

4 Package power dissipation is dependent on the copper pad area on the 4 2002-2012 Microchip Technology CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)TEMPERATURE CHARACTERISTICSE lectrical Specifications: Unless otherwise noted, over operating temperature range with VDD 1 , High Input VLogic 0 , Low Input VoltageVIL Voltage RangeVIN 5 VDD + CurrentIIN 10 +10 A0V VIN VDDO utputHigh Output VoltageVOHVDD VDC TESTLow Output VoltageVOL TESTO utput Resistance, HighROH 35 IOUT = 10 mA, VDD = 18 VOutput Resistance, LowROL IOUT = 10 mA, VDD = 18 VSwitching Time (Note 1)Rise TimetR 3260nsFigure 4-1, CL = 2,500 pFFall TimetF 3460nsFigure 4-1, CL = 2,500 pFDelay TimetD1 50100nsFigure 4-1 Delay TimetD2 65100nsFigure 4-1 Power SupplyPower Supply CurrentIS AVIN = 3 VVIN = 0 VOperating Input 18 VNote 1:Switching times ensured by Specifications: Unless otherwise noted, all parameters apply with VDD RangesSpecified Temperature Range (C)TA0 +70 CSpecified Temperature Range (I)TA 25 +85 CSpecified Temperature Range (E)TA 40 +85 CSpecified Temperature Range (V)TA 40 +125 CMaximum Junction TemperatureTJ +150 CStorage Temperature RangeTA 65 +150 CPackage Thermal ResistancesThermal Resistance, 5L-TO-220 JA 71 C/WThermal Resistance, 8L-CERDIP JA 150 C/WThermal Resistance, 8L-6x5 DFN JA C/WTypical four-layer board with vias to ground Resistance, 8L-PDIP JA 125 C/WThermal Resistance, 8L-SOIC JA 155 C/W 2002-2012 Microchip Technology 5TC4420 PERFORMANCE CURVESNote: Unless otherwise indicated, TA = +25 C with VDD 2-1:Rise Time vs.

5 Supply 2-2:Rise Time vs. Capacitive 2-3:Propagation Delay Time vs. 2-4:Fall Time vs. Supply 2-5:Fall Time vs. Capacitive 2-6:Supply Current vs. Capacitive :The graphs and tables provided following this note are a statistical summary based on a limited number ofsamples and are provided for informational purposes only. The performance characteristics listed hereinare not tested or guaranteed. In some graphs or tables, the data presented may be outside the specifiedoperating range ( , outside specified power supply range) and therefore outside the warranted Voltage (V)C = 2200 pFL120100806040200 Time (nsec)C = 4700 pFLC = 10,000 pFLV = 12 VDDV = 5 VDD60402010100010,000 Capcitive Load (pF)V = 18 VDD80100 Time (nsec)50403020100 60 202060100140TA ( C)Delay Time (nsec)D1tD2tC = 2200 pFLV = 18 VDD57 9111315 Supply Voltage (V)C = 2200 pFLTime (nsec)C = 4700 pFLC = 10,000 pFL10080604020060402010100010,000 Capacitive Load (pF)Time (nsec)V = 18 VDD80100V = 12 VDDV = 5 VDD0100100010,000 Capacitive Load (pF)Supply Current (mA)8470564228140500 kHz200 kHz20 kHzV = 15 VDDTC4420/TC4429DS21419D-page 6 2002-2012 Microchip Technology : Unless otherwise indicated, TA = +25 C with VDD 2-7:Rise and Fall Times vs.

6 2-8:Propagation Delay Time vs. Supply 2-9:Supply Current vs. 2-10:High-State Output Resistance vs Supply 2-11:Effect of Input Amplitude on Propagation 2-12:Low-State Output Resistance vs. Supply Voltage. 60 202060100140TA ( C)tRISEt50403020100 Time (nsec)C = 2200 pFV = 18 VDDFALLL65605550454035 Delay Time (nsec)4 6 8 1012141618 Supply Voltage (V)tD2tD110000100100010,000 Frequency (kHz)Supply Current (mA)10100018V10V5VC = 2200 pFL54325913 Supply Voltage (V)R ( ) OUT100 mA50 mA10 mA7111520016012080400 Delay Time (nsec)567111315 Load = 2200 pFInput 3 VInput 5 VInput 8V and 10V89 101214V (V) Voltage (V)R ( ) OUT100 mA50 mA10 mA71115 2002-2012 Microchip Technology 7TC4420/ tc4429 Note: Unless otherwise indicated, TA = +25 C with VDD 2-13:Crossover Area (A S) x 10-856711131589 101214 Supply Voltage (V)The values on this graph represent the loss seenby the driver during one complete cycle.

7 For asingle transition, divide the value by 8 2002-2012 Microchip Technology DESCRIPTIONSThe descriptions of the pins are listed in Table 3-1:PIN FUNCTION Input (VDD)The VDD input is the bias supply for the MOSFET driverand is rated for to 18V with respect to the groundpins. The VDD input should be bypassed to ground witha local ceramic capacitor. The value of the capacitorshould be chosen based on the capacitive load that isbeing driven. A minimum value of F is InputThe MOSFET driver input is a high-impedance,TTL/CMOS compatible input. The input circuitry of theTC4420/ tc4429 MOSFET driver also has a speed-up capacitor. This helps to decrease the propagationdelay times of the driver. Because of this, input signalswith slow rising or falling edges should not be used, asthis can result in double-pulsing of the MOSFET driveroutput.

8 Push-Pull OutputThe MOSFET driver output is a low-impedance,CMOS, push-pull style output capable of driving acapacitive load with peak currents. The MOSFET driver output is capable of withstanding peakreverse currents of either polarity. ground pins are the return path for the bias currentand the high peak currents that discharge the loadcapacitor. The ground pins should be tied into a groundplane or have very short traces to the bias supplysource Metal PadThe exposed metal pad of the 6x5 DFN package is notinternally connected to any potential. Therefore, thispad can be connected to a ground plane or othercopper plane on a printed circuit board (PCB) to aid inheat removal from the CERDIP/ PDIP/SOICPin DFNPin TO-220 SymbolDescription11 VDDS upply input, to 18V221 INPUTC ontrol input, TTL/CMOS compatible input33 NCNo Connection442 GNDG round554 GNDG round665 OUTPUTCMOS push-pull output77 OUTPUTCMOS push-pull output883 VDDS upply input, to 18V PAD NCExposed Metal Pad TABVDDM etal Tab is at the VDD Potential 2002-2012 Microchip Technology 9TC4420 INFORMATIONFIGURE 4-1:Switching Time Test DriverNon-Inverting DriverInputtD1tFtRtD2 Input: 100 kHz,square wave,tRISE = tFALL 10 nsOutputInputOutputtD1tFtRtD2+5V10%90%10 %90%10%90%+18V0V90%10%10%10%90%+5V+18V0V 0V0V90%2675418CL = 2,500 FInputVDD = FNote.

9 Pinout shown is for the PDIP, SOIC, DFN and CERDIP 10 2002-2012 Microchip Technology Marking Information5-Lead TO-220 XXXXXXXXXXXXXXXXXXYYWWNNNE xample: tc4420 CAT04192568-Lead CERDIP (300 mil)Example:XXXXXXXXXXXXXNNNYYWWTC4420 MJA25604198-Lead DFNE xample:XXXXXXXXXXXXXXXXYYWWNNNTC4420 EMF0419256 informationYYear code (last digit of calendar year)YYYear code (last 2 digits of calendar year)WWWeek code (week of January 1 is week 01 )NNNA lphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn)*This package is Pb-free. The Pb-free JEDEC designator ( )can be found on the outer packaging for this :In the event the full Microchip part number cannot be marked on one line, it willbe carried over to the next line, thus limiting the number of availablecharacters for customer-specific 2002-2012 Microchip Technology 11TC4420/ tc4429 Package Marking Information (Continued)XXXXXXXXXXXXXNNNYYWW8-Lead PDIP (300 mil)Example: tc4420 CPA25604198-Lead SOIC (150 mil)Example:XXXXXXXXXXXXYYWWNNNTC4420 EOA0419256TC4420/TC4429DS21419D-page 12 2002-2012 Microchip Technology Plastic Transistor Outline (AT) (TO-220)LH1 QEbe1eC1J1 FADa(5X) PEJECTOR PINe3 Drawing No.

10 C04-036 Notes:Dimensions D and E1 do not include mold flash or protrusions. Mold flash orprotrusions shall not exceed .010" ( ) per equivalent: TO-220*Controlling ParameterMold Draft AngleLead WidthLead LimitsOverall HeightLead LengthOverall WidthLead *. 7 3 7 Overall Lead Hole to Bottom of Hole Between :For the most current package drawings, please see the Microchip Packaging Specification locatedat 2002-2012 Microchip Technology 13TC4420/TC44298-Lead Ceramic Dual In-line 300 mil (JA) (CERDIP) Row Lead Lead to Seating Pkg. to Shoulder to Seating of PinsMAXNOMMINMAXNOMMIND imension LimitsMILLIMETERSINCHES*UnitsJEDEC Equivalent: MS-030 Drawing No. C04-010*Controlling Parameter12 DnE1ceBEpLA2BB1AA1 Note:For the most current package drawings, please see the Microchip Packaging Specification locatedat 14 2002-2012 Microchip Technology Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S) Saw SingulatedNote:For the most current package drawings, please see the Microchip Packaging Specification locatedat 2002-2012 Microchip Technology 15TC4420/TC44298-Lead Plastic Dual In-line (PA) 300 mil (PDIP)B1BA1 ALA2p EeB cE1nD12 UnitsINCHES*MILLIMETERSD imension LimitsMINNOMMAXMINNOMMAXN umber of to Seating Package to Seating to Shoulder Package to Seating Lead Lead Row Spacing Draft Angle Top 51015 51015 Mold Draft Angle Bottom 51015 51015* Controlling ParameterNotes:Dimensions D and E1 do not include mold flash or protrusions.