TPIC8101 Knock Sensor Interface (Rev. C) - TI.com

1 Product Sample & Technical Tools & Support &. Folder Buy Documents Software Community TPIC8101 . SLIS110C APRIL 2003 REVISED MARCH 2015. TPIC8101 Knock Sensor Interface 1 Features 3 Description . 1 Qualified for Automotive Applications The TPIC8101 is a dual-channel signal processing IC. for detection of premature detonation in combustion AEC-Q100 Qualified With the Following Results: engine. The two Sensor channels are selectable Device Temperature Grade 1: 40 C to 125 C through the SPI bus. The Knock Sensor typically Ambient Operating Temperature Range provides an electrical signal to the amplifier inputs. Device HBM Classification Level 3A The sensed signal is processed through a programmable band-pass filter to extract the Device CDM Classification Level C6 frequency of interest (engine Knock or ping signals). Dual-Channel Knock Sensor Interface The band-pass filter eliminates any engine Programmable Input Frequency Prescaler background noise associated with combustion.

2 The (OSCIN) engine background noise is typically low in amplitude compared to the predetonation noise. Serial Interface With Microprocessor (SPI). Programmable Gain The detected signal is full-wave rectified and integrated by use of the INT/HOLD signal. The digital Programmable Band-Pass Filter Center output from the integration stage is either converted Frequency to an analog signal, passed through an output buffer, External Clock Frequencies up to 24 MHz or be read directly by the SPI. 4, 5, 6, 8, 10, 12, 16, 20, and 24 MHz This analog buffered output may be interfaced to an Programmable Integrator Time Constants A/D converter and read by the microprocessor. The Operating Temperature Range 40 C to 125 C digital output may be directly interfaced to the microprocessor. 2 Applications Device Information(1). Engine Knock Detector Signal Processing PART NUMBER PACKAGE BODY SIZE (NOM). Analog Signal Processing With Filter TPIC8101 SOIC (20) mm mm Characteristics (1) For all available packages, see the orderable addendum at the end of the data sheet.

3 Simplified Schematic Vref VDD / 2 +.. CH1P +. CH1N . CH1FB Mux SAR. rd 3 Order AAF 10-Bit ADC <1:10>. CH2P + fS = 200 kHz CH2N . CH2FB. Programmable Programmable Programmable Gain Band-Pass Rectifier Integrator Filter DSP. R2R. 10-Bit DAC SPI. fS = 200 kHz +. Test Mode DSP Control SDI. XIN. INT/HOLD. GND. SDO. VDD. OUT. XOUT. SCLK. CS. TEST. 1. An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. TPIC8101 . SLIS110C APRIL 2003 REVISED MARCH 2015 Table of Contents 1 Features .. 1 Functional Block Diagram .. 9. 2 Applications .. 1 Feature 9. 3 Description .. 1 Device Functional 12. 14. 4 Revision 2. 5 Description (continued).. 3 9 Application and Implementation .. 16. Application 16. 6 Pin Configuration and Functions .. 3. Typical Application .. 16. 7 4. 10 Power Supply Recommendations.

4 19. Absolute Maximum Ratings .. 4. ESD 4 11 19. Layout Guidelines .. 19. Recommended Operating 4. Layout Example .. 19. Thermal Information .. 4. Electrical 5 12 Device and Documentation Support .. 20. Timing Requirements .. 7 Trademarks .. 20. Typical Characteristics .. 8 Electrostatic Discharge Caution .. 20. Glossary .. 20. 8 Detailed Description .. 9. Overview .. 9 13 Mechanical, Packaging, and Orderable Information .. 20. 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (December 2014) to Revision C Page Added qualification for automotive applications to Features .. 1. Added the ESD Ratings table with HBM and CDM ratings .. 4. Changes from Revision A (May 2005) to Revision B Page Added Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section.

5 1. 2 Submit Documentation Feedback Copyright 2003 2015, Texas Instruments Incorporated Product Folder Links: TPIC8101 . TPIC8101 . SLIS110C APRIL 2003 REVISED MARCH 2015. 5 Description (continued). The data from the A/D enables the system to analyze the amount of retard timing for the next spark ignition timing cycle. With the microprocessor closed-loop system, advancing and retarding the spark timing optimizes the load/RPM conditions for a particular engine (data stored in RAM). 6 Pin Configuration and Functions SOIC Package (Top View). VDD 1 20 CH1P. GND 2 19 CH1N. Vref 3 18 CH1FB. OUT 4 17 CH2FB. NC 5 16 CH2N. NC 6 15 CH2P. INT/HOLD 7 14 TEST. CS 8 13 SCLK. XIN 9 12 SDI. XOUT 10 11 SDO. Pin Functions PIN TYPE. DESCRIPTION. NAME NO. (PULLUP/PULLDOWN). VDD 1 I 5-V input supply GND 2 I Ground connection Vref 3 O Supply reference generator with external bypass capacitor OUT 4 O Buffered integrator output 5. NC (1) No connection 6.

6 INT/HOLD 7 I (pulldown) Selectable for integrate (high) or hold (low) mode (with internal pulldown). CS 8 I (pullup) Chip select for SPI communications (active low with internal pullup). XIN 9 I Inverter input for oscillator XOUT 10 O Inverter output for oscillator SDO 11 O Serial data output for SPI bus SDI 12 I (pullup) Serial data input line SCLK 13 I (pullup) SPI clock TEST 14 I (pullup) Test mode (active low), open for normal operation CH2P 15 I Positive input for amplifier 2. CH2N 16 I Negative input for amplifier 2. CH2FB 17 O Output of amplifier 2, for feedback connection CH1FB 18 O Output of amplifier 1, for feedback connection CH1N 19 I Negative input for amplifier 1. CH1P 20 I Positive input for amplifier 1. (1) These terminals are to be used for test purposes only and are not connected in the system application. No signal traces should be connected to the NC terminals. Copyright 2003 2015, Texas Instruments Incorporated Submit Documentation Feedback 3.

7 Product Folder Links: TPIC8101 . TPIC8101 . SLIS110C APRIL 2003 REVISED MARCH 2015 7 Specifications Absolute Maximum Ratings (1). over operating free-air temperature range (unless otherwise noted). MIN MAX UNIT. (2) (3). VDD Regulated input voltage 7 V. (2) (3). VO Output voltage 7 V. VIN Input voltage (2) (3) 7 V. IIN DC input current on terminals CH1P, CH1N, CH2P, and CH2N (2) (3) 2 mA. VDCIN DC input voltage on terminals CH1P, CH1N, CH2P and CH2N (2) (3) 14 V. R JA Junction-to-ambient thermal impedance 120 C/W. PD Continuous power dissipation 200 mW. TA Operating ambient temperature 40 125 C. Tstg Storage temperature 65 150 C. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

8 (2) All voltage values are with respect to GND. (3) Absolute negative voltage on these terminals is not to go < V. ESD Ratings VALUE UNIT. Human-body model (HBM) (1) 4000. V(ESD) Electrostatic discharge V. Charged-device model (CDM) 1500. (1) The human body model is a 100-pF capacitor discharged through a resistor into each terminal. Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted). MIN MAX UNIT. VDD Regulated input voltage V. VO Output voltage V. VIN Input voltage VDD V. IIN DC input current on terminals CH1P, CH1N, CH2P, and CH2N 1 1 A. VDCIN DC input voltage on terminals CH1P, CH1N, CH2P, and CH2N Vref, (VDD / 2) V. PD Continuous power dissipation 100 mW. Thermal Information TPIC8101 . (1). THERMAL METRIC DW [SOIC] UNIT. 20 PINS. R JA Junction-to-ambient thermal resistance R JC(top) Junction-to-case (top) thermal resistance R JB Junction-to-board thermal resistance C/W.

9 JT Junction-to-top characterization parameter JB Junction-to-board characterization parameter (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 4 Submit Documentation Feedback Copyright 2003 2015, Texas Instruments Incorporated Product Folder Links: TPIC8101 . TPIC8101 . SLIS110C APRIL 2003 REVISED MARCH 2015. Electrical Characteristics VDD = 5 V 5%, input frequency before prescaler = 4 to 20 MHz ( ), TA = 40 C to 125 C (unless otherwise specified). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT. IDD(Q) Quiescent current VDD = 5 V mA. IDD(OP) Operating current VDD = 5 V, XIN = 8 MHz 20 mA. Vmid0 Midpoint voltage VDD = 5 V, ISource = 2 mA V. Vmid1 Midpoint voltage VDD = 5 V, ISink = 2 mA V. Vmid2 Midpoint voltage VDD = 5 V, IL = 0 mA V. Internal pullup resistor CS, SDI, SCLK, Rpull0 VIN = GND 30 k . TEST. Rpull1 Internal pulldown resistor INT/HOLD VIN = VDD 20 k.

10 Input leakage current CS, SDI, SCLK, Measured at GND and VDD, Ilkg 3 A. INT/HOLD, TEST VDD = V = VIN. Low-level input voltage INT/HOLD, CS, 30% of VIL. TEST, SDI, SCLK VDD. High-level input voltage INT/HOLD, 70% of VIH. CS, TEST, SDI, SCLK VDD. VOL Low-level output voltage SDO ISink = 4 mA, VDD = 5V V. VOH High-level output voltage SDO ISource = 100 A, VDD = 5 V V. Measured at GND and VDD = 5 V, Ilkg(OL) Low-level leakage current SDO 10 10 A. SDO in high impedance VOL(XOUT) Low-level output voltage ISink = 500 A, VDD = V V. VOH(XOUT. High-level output voltage ISource = 500 A, VDD = 5 V V. ). Hysteresis voltage INT/HOLD, CS, Vhyst V. XIN, SDI, SCLK, TEST. INPUT AMPLIFIERS. CH1FB and CH2FB high-level output VDD = 5 V, ISource = 100 A VDD VDD VOH (1) V. voltage VDD = 5 V, ISource = 2 mA VDD CH1FB and CH2FB low-level output ISink = 100 A 15 50. VOL (1) mV. voltage ISink = 2 mA 500. Cross-coupling attenuation CH1FB and in max(ch1) = 20 kHz, measured on CATTEN 40 dB.