Understanding and minimising ADC conversion errors

1 AN1636/06031/42AN1636 APPLICATION NOTEUNDERSTANDING AND minimising ADC CONVERSIONERRORSBy Microcontroller Division Applications1 INTRODUCTIONThe purpose of this document is to explain the different ADC errors and the techniques thatapplication developers can use to minimise them. The ADC (Analog to digital Converter) is animportant peripheral that connects the analog world to the digital world of this application note the ADC embedded in the ST7 microcontroller is used as an example,however the same principles to apply to other accuracy of analog to digital conversion has an impact on overall system quality and effi-ciency. To be able to improve accuracy you need to understand the errors associated with theADC and the parameters affecting ADC itself, cannot ensure the accuracy of results, It depends on your overall system de-sign. For this reason, you need to do some careful preparation before starting your of parameters affect the ADC accuracy depending on the application.

2 Some of these fac-tors are: PCB layout, voltage source, I/O switching and analog source AND minimising ADC conversion ERRORS1 INTRODUCTION .. 11 WHAT IS AN ADC? .. 42 ADC BLOCK DESCRIPTION .. ANALOG INPUT PINS .. ANALOG MULTIPLEXER .. SAMPLE AND HOLD CIRCUIT .. CONTROL BLOCK .. ANALOG SUPPLY AND REFERENCE .. 113 ADC TERMINOLOGY .. REFERENCE VOLTAGE .. RESOLUTION .. QUANTIZATION .. MONOTONICITY .. BIPOLAR AND UNIPOLAR ADC INPUT .. HARDWARE AVERAGING .. SAMPLING THEOREM .. 154 SOURCES OF ERROR .. POWER SUPPLY NOISE .. POWER SUPPLY REGULATION .. ANALOG INPUT signal NOISE .. EFFECT OF ANALOG SOURCE RESISTANCE .. EFFECT OF SOURCE CAPACITANCE .. EFFECT OF INJECTION CURRENT .. I/O PIN CROSS-TALK .. EMI-INDUCED NOISE .. 2623/42 Understanding AND minimising ADC conversion ERRORS5 DIFFERENT TYPES OF A/D CONVERTER errors .

3 OFFSET ERROR .. GAIN ERROR .. DIFFERENTIAL LINEARITY ERROR .. INTEGRAL LINEARITY ERROR .. TOTAL UNADJUSTED ERROR .. 336 PCB LAYOUT RECOMMENDATIONS .. 347 HOW POWER SAVING MODES AFFECT THE ADC .. 398 RELATED DOCUMENTATION .. 4114/42 Understanding AND minimising ADC conversion ERRORS1 WHAT IS AN ADC?An analog to digital converter is a peripheral which converts analog signals in a defined rangeto the digital outputs. In the real world, signals are mostly available in analog form. To use a microcontroller in thistype of system, an ADC is required, so that the signals can be converted to the digital application software can then process the digital outputs and take decisions dependingon the application or system limitation imposed by the finite number of digital outputs decides how close the output isto the analog input.

4 The more bits there are in the output, the closer the digital result will be tothe analog signal . In other words, the resolution of the ADC is defined by the number of bits inthe digital result (8 bits, 10 bits etc) and the input voltage range. Successive Approximation MethodDifferent techniques are available for converting analog signals to digital outputs. The Succes-sive approximation method is the most popular technique. It is also known as Successive ap-proximation Register (SAR) technique. This technique uses binary search method. It consistsof a high speed comparator, DAC ( digital to analog converter), and control logic. Refer toFigure 1. Successive Approximation Block DiagramThe SAR starts by forcing the MSB (Most Significant bit) high (for example in an 8 bit ADC itbecomes 1000 0000), the DAC converts it to VAREF/2. The analog comparator compares theinput voltage with VAREF/2.

5 If the input voltage is greater than the voltage corresponding to theMSB, the bit is left set, otherwise it is reset. ControlLogic+-ComparatorDAC From Sampleand HoldVAREFn bit registerVIND igital Output5/42 Understanding AND minimising ADC conversion ERRORSVAREF is the reference voltage used by ADC for conversions. The details are mentioned inSection this comparison is done, the next significant bit is set (=VAREF/4) and a comparison isdone again with the input voltage. The procedure is followed till all the bit positions are the end of all the bit comparisons we get the corresponding digital output for the successive approximation steps are shown in Table 1. As you can see, the digital outputobtained from the ADC is B2h when the analog input is 1. 8-bit ADC successive approximation stepsStepsVin = , VAREF= 5 VDigital codeDAC outputComparator outputdigital output(for steps)11000 000021100 000031010 000041011 000051011 000061011 000071011 001081011 0010 Final output = B2h6/42 Understanding AND minimising ADC conversion ERRORS2 ADC BLOCK DESCRIPTION Figure 2.

6 ADC Block diagramThe ADC can be divided into the following Analog input pinsb. Analog multiplexerc. Sample and Hold circuitd. Successive approximation blocke. Control blockf. Analog supply/ ANALOG INPUT PINSS everal analog input pins are available to connect different analog signals. These are inter-nally multiplexed to use same sample and hold circuit and SAR logic. CH2CH1 EOC SPEED ADON0CH0 ADCCSRAIN0 AIN1 AINxANALOGMUXD4D3D5D9D8D7D6D2 ADCDRH4 DIV 4fADCfCPUD1D0 ADCDRL0100 0000CH3 DIV 2(a)(b)Sample and Hold circuit(c)Successive ApproximationBlock(d)(e)VAREFVSSA(f)7/42 Understanding AND minimising ADC conversion ERRORSF igure 3. Electrical diagram of typical ADC applicationConfiguring the analog pinChoose any I/O port that has analog input capability (AIN alternate function) and configure itas floating input. You can do this by writing 0 in the DDR and OR register bits of the corre-sponding port.

7 At reset, most of the ST7 IOs are configured by default as floating pin should NOT be configured as floating input with pull-up. This configuration reducesthe ADC accuracy. The reason being the potential divider formed between the pull-up resist-ance and RADC. Also some current flows from VDD to the analog source. This current is drawnfrom the VDD supply. Also there is a potential divider formed between VDD, RPU and RAIN,where RAIN is the series impedance of the voltage 4. Analog input with pull-upConfiguring the analog input as floating input with pull-up ( instead of floating input ) will causemore current to be drawn from the VDD is also an affect on the accuracy of theADC and the digital output converted by ADC may not be 1 A/D ConversionRADCCAIN\/\/\/\/\/\/CADCRADCVS SA (Analog Ground) \/\/\/\/\/\VDDRPUNOT RECOMMENDEDVINC urrentfrom VDDRPU should not be enabled.

8 \/\/\/\/\/RAIN8/42 Understanding AND minimising ADC conversion ERRORSA nalog Pin Input Impedance RADC and CADC (hold capacitor) define the input impedance of the analog pins. RADC is alsocalled as Rss (Resistance of sampling switch and internal trace/resistance). Please refer tothe Sample and Hold circuit explanation in Section the hold capacitor is fully discharged, the minimum input impedance is RADC. As the hold ca-pacitor starts to charge, the current flowing into the pin will reduce. If the hold capacitor ischarged to a level equal to the external voltage there will be only minimal charging currentflowing into the analog input. Figure 5. Analog input pin ImpedanceThe minimum input impedance of the analog pin is thus RADC. In the datasheet the maximumvalue of RADC is specified instead of a typical value, so that the user can calculate the affectof external resistance on sampling.

9 This is explained in Section ANALOG MULTIPLEXERThe ADC can have several analog input pins. These pins are connected internally to the An-alog to digital converter using the analog multiplexer. You can select each pin simply bywriting in the appropriate control register. This allows a single Sample and Hold circuit and An-alog to digital Converter block to be used to convert several analog input allows you to switch the analog channels and convert them one by one through softwarecontrol.\/\/\/\/\/\/CADCRADCVSSA (Analog Ground)Inputimpedance Zi = RADC + CADC9/42 Understanding AND minimising ADC conversion ERRORSF igure 6. Analog SAMPLE AND HOLD CIRCUITThe sample and hold circuit samples the input signal and charges the internal hold capacitorCADC to the voltage equal to VIN through RADC. The analog pin is then disconnected and thevoltage across the capacitor is then converted to digital code using successive 7.

10 Sample and Hold circuitThe sample and hold circuit consists of an electrically operated analog switch, internalcharging resistance and hold soon as the ADC conversion starts, the electrically operated switch is closed, connectingthe hold capacitor to the analog input through the internal ADC resistance RADC. This causesa charging current to flow into the analog input and the capacitor starts to charge. The time theswitch remains closed is decided by the fADC. It is called sampling time. The sampling time isgenerally indicated in the datasheet as a multiple of fADC clock periods. Time period tAD = 1/fADCCH[2:0] = 010To Sample and HoldAIN0 AIN1 AIN7 CircuitAnalog InputChannelsChannel selection bits = 010 selectsAIN2 AIN2\/\/\/\/\/\/Electrically operatedswitchCADCRADCFrom AnalogMultiplexerVSSA (Analog Ground)VIN10/42 Understanding AND minimising ADC conversion ERRORSF igure 8.