Transcription of INSULATED GATE BIPOLAR TRANSISTOR - irf.com
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INSULATED GATE BIPOLAR TRANSISTOR - irf.com
IRG7CH54K10EF-R 1 2012 International Rectifier August 30, 2012 VCES = 1200V IC(Nominal) = 50A TJ(max) = 175 C VCE(on) typ = @ IC= 50A Applications Medium Power Drives UPS HEV Inverter Welding ECGn-channelBase part number Package Type Standard Pack Orderable part number Form Quantity IRG7CH54K10EF-R Die on film Wafer 1 IRG7CH54K10EF-R Mechanical Parameter Die Size x mm2 Minimum Street Width 75 m Emiter Pad Size (Included gate Pad) See Die Drawing mm2 gate Pad Size x Area Total / Active 57 Thickness 140 m Wafer Size 200 mm Flat Position 0 Degrees Maximum-Possible Chips per Wafer 465 pcs Passivation Front side Silicon Nitride Front Metal Al, Si (4 m) Bac
Qgc Gate-to-Collector Charge (turn-on) — 110 — V CC = 600V Switching Characteristics (Inductive Load-Not subject to production test-Verified by design/characterization) Parameter Min. …
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