High-voltage resonant controller - STMicroelectronics
A higher level OCP latches off the IC if the first- level protection is not su fficient to control the primary current. Their combination offers complete protection against overload and short circuits. An additional latched disable input (D IS) allows easy implementation of OTP and/or
Download High-voltage resonant controller - STMicroelectronics
Information
Domain:
Source:
Link to this page:
Documents from same domain
Low-power dual operational amplifier - st.com
www.st.comFebruary 2016 DocID2471 Rev 17 1/24 This is information on a product in full production. www.st.com LM2904, LM2904A Low-power dual operational amplifier
AN3128 Application note - st.com
www.st.comJune 2011 Doc ID 16918 Rev 5 1/105 AN3128 Application note STM32 embedded graphic objects/touchscreen library Introduction This library is a firmware package which contains a collection of routines, data structures,
AN4767 Application note - st.com
www.st.comDocID028380 Rev 2 7/16 AN4767 Dual bank use cases 15 With dual bank, all the manipulation with the other bank is just another task of the main program.
AN3155 Application note - st.com
www.st.comOctober 2016 DocID17066 Rev 7 1/37 1 AN3155 Application note USART protocol used in the STM32 bootloader Introduction This application note describes the USART protocol used in the STM32 microcontroller
USB Power Delivery and Type-C - st.com
www.st.comUSB Type -C Overview USB Power Delivery specification introduces USB Type-C receptacle, plug and cable; they provide a smaller, thinner and more robust alternative to existing USB interconnect.
Datasheet - L78 - Positive voltage regulator ICs - …
www.st.comTO- 2 2 0 TO-2 2 0 F P DPAK D² PAK Features • Output current up to 1.5 A • Output voltages of 5; 6; 8; 8.5; 9; 12; 15; 18; 24 V • Thermal overload protection
AN2867 Application note - st.com
www.st.comMay 2017 DocID15287 Rev 11 1/43 1 AN2867 Application note Oscillator design guide for STM8AF/AL/S and STM32 microcontrollers Introduction Many designers know oscillators based on Pierce-Gate topology (hereinafter referred to as
AN4776 Application note - st.com
www.st.comMay 2017 DocID028459 Rev 2 1/73 1 AN4776 Application note General-purpose timer cookbook Introduction The timer peripheral is part of …
120-volt, 100-watt, DMOS audio amplifier with mute …
www.st.comSeptember 2010 Doc ID 6744 Rev 8 1/21 21 TDA7293 120-volt, 100-watt, DMOS audio amplifier with mute and standby Features Multipower BCD technology Very high operating voltage range (±50 V)
Electronic transformer for a 12V halogen lamp - …
www.st.comAPPLICATION NOTE AN528/0999 1/4 ELECTRONIC TRANSFORMER FOR A 12V HALOGEN LAMP by P. Fichera, R. Scollo 1. INTRODUCTION Lighting that uses halogen lamps is commonly found
Related documents
Precision T3600 Owner's Manual
downloads.dell.comUnthread the cables from the latches. 5. Press on the clasp to release the latch holding the cables on the side of the optical-drive cage. 6. Press down on the latch and lift up the cables. 10. 7. Lift up the release latch on top of the ODD cage. 8. Holding the release latch, slide the optical-drive cage from the optical drive compartment.
SST25VF016B - Microchip Technology
ww1.microchip.comData Latches SuperFlash X - Decoder Memory Control Logic Address Buffers and Latches CE# Y - Decoder SCK SI SO WP# HOLD# Serial Interface. SST25VF016B DS20005044C-page 4 2015 Microchip Technology Inc. 2.0 PIN DESCRIPTION FIGURE 2-1: PIN ASSIGNMENTS ... SST25VF016B 1 2. 3-A 0 7 00. SST25VF016B 0)--). C 2 ...
Modeling Latches and Flip-flops - Xilinx
www.xilinx.comLatches Part 1 Storage elements can be classified into latches and flip-flops. A latch is a device with exactly two stable states: a high-output and a low-output. A latch has a feedback path, so information can be retained by the device. Therefore latches are volatile memory devices, and can store one bit of data for as long as the
Digital Phase Locked Loop - University of Maine
ece.umaine.eduThere are two D-latches used in PFD. Like any other regular D-latches they have a clock input, a data input, an inverted clear input and two opposite outputs, q and q bar. Each D-latch is made out of 4 three input nand gates and 2 two input nand gate. These nand gates are sized to give same delay as basic inverter.
Modeling Latches and Flip-flops - Xilinx
www.xilinx.comLatches Part 1 Storage elements can be classified into latches and flip-flops. Latch is a device with exactly two stable states: high-output and low-output. A latch has a feedback path, so information can be retained by the device. Therefore latches are volatile memory devices, and can store one bit of data for as long as the device is powered.
7. Latches and Flip-Flops - cs.ucr.edu
www.cs.ucr.eduChapter 7 – Latches and Flip-Flops Page 4 of 18 From the above analysis, we obtain the truth table in Figure 4(b) for the NAND implementation of the SR latch. Q is the current state or the current content of the latch and Qnext is the value to be updated in the next state. Figure 4(c) shows the logic symbol for the SR latch.