PCA9535 PCA9535C 16-bit I2C-bus and SMBus, low power I/O ...

1 1. General descriptionThe PCA9535 and PCA9535C are 24-pin CMOS devices that provide 16 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C-bus /SMBus applications and was developed to enhance the NXP Semiconductors family of I2C-bus I/O expanders. The improvements include higher drive capability, 5 V I/O tolerance, lower supply current, individual I/O configuration, and smaller packaging. I/O expanders provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, PCA9535 and PCA9535C consist of two 8-bit Configuration (Input or Output selection), Input, Output and Polarity Inversion (active HIGH or active LOW operation) registers. The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits.

2 The data for each input or output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion register. All registers can be read by the system master. Although pin-to-pin and I2C-bus address compatible with the PCF8575, software changes are required due to the enhancements and are discussed in Application Note PCA9535 is identical to the PCA9555 except for the removal of the internal I/O pull-up resistor which greatly reduces power consumption when the I/Os are held PCA9535C is identical to the PCA9535 except that all the I/O pins are high-impedance open-drain PCA9535 and PCA9535C open-drain interrupt output is activated when any input state differs from its corresponding Input Port register state and is used to indicate to the system master that an input state has changed.

3 The power -on reset sets the registers to their default values and initializes the device state hardware pins (A0, A1, A2) vary the fixed I2C-bus address and allow up to eight devices to share the same I2C-bus /SMBus. The fixed I2C-bus address of the PCA9535 and PCA9535C are the same as the PCA9555 allowing up to eight of these devices in any combination to share the same I2C- Features and benefits Operating power supply voltage range of V to V 5 V tolerant I/Os Polarity Inversion register Active LOW interrupt output Low standby current Noise filter on SCL/SDA inputsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interruptRev. 6 7 November 2017 Product data sheetPCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2017.

4 All rights data sheetRev. 6 7 November 2017 2 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interrupt No glitch on power -up Internal power -on reset 16 I/O pins which default to 16 inputs 0 Hz to 400 kHz clock frequency ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA Offered in four different packages: SO24, TSSOP24, HVQFN24 and HWQFN243. Ordering information Ordering options Table informationType numberTopside markingPackageNameDescriptionVersionPCA9 535 DPCA9535 DSO24plastic small outline package; 24 leads; body width mm SOT137-1 PCA9535 PWPCA9535 PWTSSOP24plastic thin shrink small outline package; 24 leads; body width mmSOT355-1 PCA9535BS9535 HVQFN24plastic thermal enhanced very thin quad flat package; no leads; 24 terminals; body 4 4 mmSOT616-1 PCA9535 HFP35 HHWQFN24plastic thermal enhanced very very thin quad flat package; no leads; 24 terminals; body 4 4 mmSOT994-1 PCA9535 CDPCA9535 CDSO24plastic small outline package; 24 leads; body width mm SOT137-1 PCA9535 CPWPCA9535 CTSSOP24plastic thin shrink small outline package; 24 leads.

5 Body width mmSOT355-1 PCA9535 CHFP35 CHWQFN24plastic thermal enhanced very very thin quad flat package; no leads; 24 terminals; body 4 4 mmSOT994-1 Table optionsType numberOrderable part numberPackagePacking methodMinimum order quantityTemperaturePCA9535 DPCA9535D,112SO24 STANDARD MARKING * IC'S TUBE - DSC BULK PACK 1200 Tamb= 40 C to +85 CPCA9535D,118SO24 REEL 13" Q1/T1 *STANDARD MARK SMD1000 Tamb= 40 C to +85 CPCA9535 PWPCA9535PW,112 TSSOP24 STANDARD MARKING * IC'S TUBE - DSC BULK PACK 1575 Tamb= 40 C to +85 CPCA9535PW,118 TSSOP24 REEL 13" Q1/T1 *STANDARD MARK SMD2500 Tamb= 40 C to +85 CPCA9535 BSPCA9535BS,118 HVQFN24 REEL 13" Q1/T1 *STANDARD MARK SMD6000 Tamb= 40 C to +85 CPCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2017.

6 All rights data sheetRev. 6 7 November 2017 3 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interruptPCA9535 HFPCA9535HF,118 HWQFN24 REEL 13" Q1/T1 *STANDARD MARK SMD6000 Tamb= 40 C to +85 CPCA9535 HFHP HWQFN24 REEL 13" Q2/T3 *STANDARD MARK SMD6000 Tamb= 40 C to +85 CPCA9535 CDPCA9535CD,112SO24 STANDARD MARKING * IC'S TUBE - DSC BULK PACK 1200 Tamb= 40 C to +85 CPCA9535CD,118SO24 REEL 13" Q1/T1 *STANDARD MARK SMD1000 Tamb= 40 C to +85 CPCA9535 CPWPCA9535 CPW,112 TSSOP24 STANDARD MARKING * IC'S TUBE - DSC BULK PACK 1575 Tamb= 40 C to +85 CPCA9535 CPW,118 TSSOP24 REEL 13" Q1/T1 *STANDARD MARK SMD2500 Tamb= 40 C to +85 CPCA9535 CHFPCA9535 CHF,118 HWQFN24 REEL 13" Q1/T1 *STANDARD MARK SMD6000 Tamb= 40 C to +85 CTable options.

7 ContinuedType numberOrderable part numberPackagePacking methodMinimum order quantityTemperaturePCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2017. All rights data sheetRev. 6 7 November 2017 4 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interrupt4. Block diagram Remark: All I/Os are set to inputs at diagram of PCA9535 ; PCA9535 CPCA9535 PCA9535 CPOWER-ONRESET002aac217I2C-BUS/SMBusCONT ROLINPUTFILTERSCLSDAVDDINPUT/OUTPUTPORTS IO0_0 VSS8-bitwrite pulseread pulseIO0_2IO0_1IO0_3IO0_4IO0_5IO0_6IO0_7 INPUT/OUTPUTPORTSIO1_08-bitwrite pulseread pulseIO1_2IO1_1IO1_3IO1_4IO1_5IO1_6IO1_7 INTA1A0A2 VDDPCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2017.

8 All rights data sheetRev. 6 7 November 2017 5 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interrupt5. Pinning Pinning Fig configuration for SO24 Fig configuration for TSSOP24 Fig configuration for HVQFN24 Fig configuration for HWQFN24 PCA9535 DPCA9535 CDINTVDDA1 SDAA2 SCLIO0_0A0IO0_1IO1_7IO0_2IO1_6IO0_3IO1_5 IO0_4IO1_4IO0_5IO1_3IO0_6IO1_2IO0_7IO1_1 VSSIO1_0002aac21412345678910111214131615 1817201922212423 VDDSDASCLA0IO1_7IO1_6IO1_5IO1_4IO1_3IO1_ 2IO1_1IO1_0 INTA1A2IO0_0IO0_1IO0_2IO0_3IO0_4IO0_5IO0 _6IO0_7 VSSPCA9535 PWPCA9535 CPW002aac2151234567891011121413161518172 01922212423002aac216 PCA9535 BSTransparent top viewIO1_3IO0_4IO0_5IO1_4IO0_3IO1_5IO0_2I O1_6IO0_1IO1_7IO0_0A0IO0_6IO0_7 VSSIO1_0IO1_1IO1_2A2A1 VDDSDASCL terminal 1index area613514415316217118789101112242322212 019 INT002aac880 Transparent top viewIO1_3IO0_4IO0_5IO1_4IO0_3IO1_5IO0_2I O1_6IO0_1IO1_7IO0_0A0IO0_6IO0_7

9 VSSIO1_0IO1_1IO1_2A2A1 INTVDDSDASCL terminal 1index area613514415316217118789101112242322212 019 PCA9535 HFPCA9535 CHFPCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2017. All rights data sheetRev. 6 7 November 2017 6 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with Pin description [1] PCA9535 I/Os are totem pole, whereas the I/Os on PCA9535C are open-drain.[2]HVQFN24 and HWQFN24 package die supply ground is connected to both the VSS pin and the exposed center pad. The VSS pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad descriptionSymbolPinDescriptionSO24, TSSOP24 HVQFN24, HWQFN24 INT122interrupt output (open-drain)A1223address input 1A2324address input 2IO0_041port 0 input/output[1]IO0_152IO0_263IO0_374IO0_ 485IO0_596IO0_6107IO0_7118 VSS129[2]supply groundIO1_01310port 1 input/output[1]IO1_11411IO1_21512IO1_316 13IO1_41714IO1_51815IO1_61916IO1_72017A0 2118address input 0 SCL2219serial clock lineSDA2320serial data lineVDD2421supply voltagePCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers.

10 NXP Semiconductors 2017. All rights data sheetRev. 6 7 November 2017 7 of 34 NXP SemiconductorsPCA9535; PCA9535C16-bit I2C-bus and SMBus, low power I/O port with interrupt6. Functional descriptionRefer to Figure 1 Block diagram of PCA9535 ; PCA9535C . Device address Command byteThe command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. Fig ; PCA9535C device addressR/W002aac2190100A2A1A0programmabl eslave addressfixedTable byteCommandRegister0 Input port 01 Input port 12 Output port 03 Output port 14 Polarity Inversion port 05 Polarity Inversion port 16 Configuration port 07 Configuration port 1 PCA9535_PCA9535 CAll information provided in this document is subject to legal disclaimers.