CBTL02043A; CBTL02043B 3.3 V, 2 differential channel, 2 ...

1 1. General descriptionCBTL02043A/B is a 2 differential channel , 2-to-1 multiplexer/demultiplexer switch for USB , PCI Express Generation 3, or other high-speed serial interface applications. The CBTL02043A/B can switch two differential signals to one of two locations. Using a unique design technique, NXP has minimized the impedance of the switch such that the attenuation observed through the switch is negligible, and also minimized the channel -to- channel skew as well as channel -to- channel crosstalk, as required by the high-speed serial interface.

2 CBTL02043A/B allows expansion of existing high-speed ports for extremely low device's pinouts are optimized to match different application layouts. CBTL02043A has input and output pins on the opposite of the package, and is suitable for edge connector(s) with different signal sources on the motherboard. CBTL02043B has outputs on both sides of the package, and the device can be placed between two connectors to multiplex differential signals from a controller. Please refer to Section 8 for layout Features and benefits 2 bidirectional differential channel , 2 : 1 multiplexer/demultiplexer High-speed signal switching for 10 Gbps applications High bandwidth: 10 GHz at 3dB Low insertion loss: dB at 100 MHz dB at GHz Low return loss: at 4 GHz Low crosstalk: 35 dB at 4 GHz Low off-state isolation: 20 dB at 4 GHz Low intra-pair skew: 5 ps typical Low inter-pair skew: 35 ps maximum VDD operating range.

3 V 10 % Shutdown pin (XSD) for power-saving mode Standby current less than 1 A ESD tolerance: 2000 V HBM 1000 V CDM DHVQFN20 packageCBTL02043A; V, 2 differential channel , 2 : 1 multiplexer/demultiplexer switchRev. 30 March 2015 Product data sheetCBTL02043A_CBTL02043 BAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2015. All rights data sheetRev. 30 March 2015 2 of 19 NXP SemiconductorsCBTL02043A; V, 2 differential channel , 2 : 1 MUX/deMUX switch3.

4 Applications Routing of high-speed differential signals with low signal attenuation PCIe Gen3 DisplayPort USB SATA 6 Gbit/s4. Ordering information [1]Total height after printed-circuit board mounting = mm Ordering options Table informationType numberTopside markingPackageNameDescriptionVersionCBTL 02043 ABQ TL02043 ADHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body mm[1]SOT764-1 CBTL02043 BBQ TL02043 BDHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals.

5 Body mm[1]SOT764-1 Table optionsType numberOrderable part numberPackagePacking methodMinimum order quantityTemperatureCBTL02043 ABQCBTL02043 ABQ,115 DHVQFN20 Reel 7 Q1/T1 *standard mark SMD3000 Tamb= 40 Cto+85 CCBTL02043 BBQCBTL02043 BBQ,115 DHVQFN20 Reel 7 Q1/T1 *standard mark SMD3000 Tamb= 40 Cto+85 CCBTL02043A_CBTL02043 BAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2015. All rights data sheetRev. 30 March 2015 3 of 19 NXP SemiconductorsCBTL02043A; V, 2 differential channel , 2 : 1 MUX/deMUX switch5.

6 Functional diagram 6. Pinning Pinning Fig diagram of CBTL02043A; CBTL02043B002aaf073B0_PB0_NB1_PB1_NA0_PA 0_NA1_PA1_NC0_PC0_NC1_PC1_NSELXSDa. CBTL02043Ab. CBTL02043 BFig configuration for DHVQFN20002aaf912 CBTL02043 ATransparent top viewC1_NA1_NSELC1_PA1_PC0_NVDDC0_PGNDB1_ NA0_NB1_PA0_PB0_NXSDB0_PVDDGNDVDDGND9128 137146155164173182191011120terminal 1index area002aaf913 CBTL02043 BTransparent top viewSELC1_PC1_NB1_NA1_NB1_PA1_PGNDC0_NVD DC0_PB0_NA0_NB0_PA0_PXSDGNDVDDGNDVDD9128 137146155164173182191011120terminal 1index areaCBTL02043A_CBTL02043 BAll information provided in this document is subject to legal disclaimers.

7 NXP Semiconductors 2015. All rights data sheetRev. 30 March 2015 4 of 19 NXP SemiconductorsCBTL02043A; V, 2 differential channel , 2 : 1 MUX/deMUX Pin description [1]DHVQFN20 package die supply ground is connected to both GND pins and exposed center pad. GND pins and the exposed center pad must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad descriptionSymbolPinTypeDescriptionCBTL0 2043 ACBTL02043BA0_P32I/Ochannel 0, port A differential signal input/outputA0_N43I/OA1_P76I/Ochannel 1.

8 Port A differential signal input/outputA1_N87I/OB0_P1918I/Ochannel 0, port B differential signal input/outputB0_N1817I/OB1_P1714I/Ochanne l 1, port B differential signal input/outputB1_N1613I/OC0_P154I/Ochannel 0, port C differential signal input/outputC0_N145I/OC1_P138I/Ochannel 1, port C differential signal input/outputC1_N129I/OSEL912 CMOS single-ended inputoperation mode selectSEL = LOW: A BSEL = HIGH: A CXSD219 CMOS single-ended inputShutdown pin; should be driven LOW or connected to VSS for normal operation.

9 When HIGH, all paths are switched off (non-conducting high-impedance state), and supply current consumption is , 6, 1011, 16, 20powerpositive supply voltage, V ( 10 %)GND[1]5, 11, 20, center pad1, 10, 15, center padpowersupply groundCBTL02043A_CBTL02043 BAll information provided in this document is subject to legal disclaimers. NXP Semiconductors 2015. All rights data sheetRev. 30 March 2015 5 of 19 NXP SemiconductorsCBTL02043A; V, 2 differential channel , 2 : 1 MUX/deMUX switch7. Functional descriptionRefer to Figure 1 Functional diagram of CBTL02043A; CBTL02043B .

10 Function selection and shutdown functionThe CBTL02043A/B provides a shutdown function to minimize power consumption when the application is not active, but power to the CBTL02043A/B is provided. The XSD pin (active HIGH) places all channels in high-impedance state (non-conducting) while reducing current consumption to near-zero. When XSD pin is LOW, the device operates normally. Table selectionX = Don t , Bn and Cn pins are high-ZLOWLOWAn to Bn and vice versaLOWHIGHAn to Cn and vice versaCBTL02043A_CBTL02043 BAll information provided in this document is subject to legal disclaimers.