0.9uA, Rail-to-Rail Input/Output Op Amps

1 2008 Microchip Technology 1 mcp6031 /2/3/4 Features Rail-to-Rail Input and Output Low Offset Voltage: 150 V (maximum) Ultra Low Quiescent Current: A (typical) Wide Power Supply Voltage: to Gain Bandwidth Product: 10 kHz (typical) Unity Gain Stable Chip Select (CS) capability: MCP6033 Extended Temperature Range:- -40 C to +125 C No Phase ReversalApplications Toll Booth Tags Wearable Products Battery Current Monitoring Sensor Conditioning Battery PoweredDesign Aids SPICE Macro Models FilterLab Software Mindi Circuit Designer & Simulator MAPS (Microchip Advanced Part Selector) Analog Demonstration and Evaluation Boards Application NotesTypical ApplicationDescriptionThe Microchip Technology Inc. mcp6031 /2/3/4 familyof operational amplifiers (op amps) operate with asingle supply voltage as low as , while drawingultra low quiescent current per amplifier ( A,typical). This family also has low input offset voltage( 150 V, maximum) and Rail-to-Rail input and outputoperation.

2 This combination of features supportsbattery-powered and portable mcp6031 /2/3/4 family is unity gain stable and hasa gain bandwidth product of 10 kHz (typical). Thesespecs make these op amps appropriate for low fre-quency applications, such as battery currentmonitoring and sensor mcp6031 /2/3/4 family is offered in single( mcp6031 ), single with power saving Chip Select (CS)input (MCP6033), dual (MCP6032), and quad(MCP6034) configurations. The mcp6031 /2/3/4 family is designed with Micro-chip s advanced CMOS process. All devices areavailable in the extended temperature range, with apower supply range of to TypesVDDIDDMCP6031100 k 1M Side Battery Current Sensor10 10 V/V()10 () ---------------------------------------- --=VIN+VIN VSSVDDVOUT12348765 NCNCNCVINA+VINA VSS12348765 VOUTAVDDVOUTBVINB VINB+ mcp6031 DFN, SOIC, MSOPMCP6032 SOIC, MSOPVIN+VIN VSSVDDVOUT12348765 NCCSNCMCP6033 DFN, SOIC, MSOPVINA+VINA VDD123414131211 VOUTAVOUTDVIND VIND+VSSMCP6034 SOIC, TSSOPVINB+510 VINC+VINB 69 VOUTB78 VOUTCVINC VIN+VSSVIN A, High Precision Op AmpsMCP6031/2/3/4DS22041B-page 2 2008 Microchip Technology CHARACTERISTICSA bsolute Maximum Ratings VDD at Input Pins.

3 2 mAAnalog Inputs (VIN+, VIN-) .. VSS to VDD + Other Inputs and Outputs .. VSS to VDD + Input Voltage .. |VDD VSS|Output Short-Circuit Current ..continuousCurrent at Output and Supply Pins .. 30 mAStorage C to +150 CMaximum Junction Temperature (TJ) .. +150 CESD protection on all pins (HBM; MM).. 4 kV; 400V Notice: Stresses above those listed under AbsoluteMaximum Ratings may cause permanent damage tothe device. This is a stress rating only and functionaloperation of the device at those or any other conditionsabove those indicated in the operational listings of thisspecification is not implied. Exposure to maximum rat-ing conditions for extended periods may affect devicereliability. See Input Voltage And Current Limits DC ELECTRICAL SPECIFICATIONSE lectrical Characteristics: Unless otherwise indicated, VDD = + to + , VSS=GND, TA= +25 C, VCM = VDD/2,VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CS is tied low. (Refer to Figure 1-2 and Figure 1-3).

4 ParametersSymMinTypMaxUnitsConditionsInp ut OffsetInput Offset VoltageVOS-150 +150 VVDD = , VCM = VDD/3 Input Offset Drift with Temperature VOS/ TA V/ C TA= -40 C to +125 C,VDD = , VCM = VDD/3 Power Supply Rejection RatioPSRR7088 dBVCM = VSSI nput Bias Current and ImpedanceInput Bias CurrentIB 60 pATA = +85 CIB 20005000pATA = +125 CInput Offset CurrentIOS pACommon Mode Input ImpedanceZCM 1013||6 ||pFDifferential Input ImpedanceZDIFF 1013||6 ||pFCommon ModeCommon Mode Input Voltage RangeVCMRVSS VDD + Mode Rejection Ratio CMRR7095 dBVCM = to , VDD = dBVCM = to , VDD = dBVCM = to , VDD = dBVCM = to , VDD = GainDC Open-Loop Gain(Large Signal)AOL95115 < VOUT < (VDD )RL = 50 k to VL 2008 Microchip Technology 3 mcp6031 /2/3/4AC ELECTRICAL SPECIFICATIONSO utputMaximum Output Voltage SwingVOL, VOHVSS + 10 VDD 10mVRL = 50 k to VL, input overdriveOutput Short-Circuit CurrentISC 5 mAVDD = 23 mAVDD = SupplySupply Current per AIO = 0, VCM = VDD, VDD = Characteristics: Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, CL = 60 pF, RL = 1 M to VL and CS is tied low.

5 (Refer to Figure 1-2 and Figure 1-3).ParametersSymMinTypMaxUnitsConditio nsAC ResponseGain Bandwidth ProductGBWP 10 kHzPhase MarginPM 65 G = +1 V/VSlew RateSR V/msNoiseInput Noise VoltageEni Vp-pf = Hz to 10 HzInput Noise Voltage Densityeni 165 nV/ Hz f = 1 kHzInput Noise Current Densityini fA/ Hzf = 1 kHzDC ELECTRICAL SPECIFICATIONS (CONTINUED)Electrical Characteristics: Unless otherwise indicated, VDD = + to + , VSS=GND, TA= +25 C, VCM = VDD/2,VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CS is tied low. (Refer to Figure 1-2 and Figure 1-3).ParametersSymMinTypMaxUnitsConditio nsMCP6031/2/3/4DS22041B-page 4 2008 Microchip Technology CHIP SELECT ELECTRICAL CHARACTERISTICS FIGURE 1-1:Timing Diagram for the CS Pin on the Specifications: Unless otherwise indicated, VDD= + to + , VSS=GND, TA= +25 C, VCM=VDD/2, VOUT=VDD/2, VL = VDD/2, CL = 60 pF, RL = 1 M to VL and CS is tied low (Refer to Figure 1-1). ParametersSymMinTypMaxUnitsConditionsCS Low SpecificationsCS Logic Threshold, LowVILVSS Input Current, LowICSL -10 pACS = VSSCS High SpecificationsCS Logic Threshold, Input Current, HighICSH 10 pACS = VDD GND CurrentISS -400 pACS = VDD Amplifier Output LeakageIO(LEAK) 10 pACS = VDDCS Dynamic SpecificationsCS Low to Amplifier Output Turn-on TimetON 4100msCS to VOUT = ,G = +1 V/V, VIN = VDD/2,RL = 50 k to VL = High to Amplifier Output High-ZtOFF 10 sCS to VOUT = ,G = +1 V/V, VIN = VDD/2,RL = 50 k to VL = HysteresisVHYST VVILHigh-ZtONVIHCStOFFVOUT-400 pAHigh-ZISSICS10 pA-400 A(typical)(typical)(typical)(typical) 2008 Microchip Technology 5 mcp6031 /2/3/4 TEMPERATURE CircuitsThe test circuits used for the DC and AC tests areshown in Figure 1-2 and Figure 1-3.

6 The bypasscapacitors are laid out according to the rules discussedin Section Supply Bypass .FIGURE 1-2:AC and DC Test Circuit for Most Non-Inverting Gain 1-3:AC and DC Test Circuit for Most Inverting Gain Characteristics: Unless otherwise indicated, VDD = + to + and VSS = RangesOperating Temperature RangeTA-40 +125 CNoteStorage Temperature RangeTA-65 +150 CThermal Package ResistancesThermal Resistance, 5L-SOT-23 JA 256 C/WThermal Resistance, 8L-DFN (2x3) JA 84 C/WThermal Resistance, 8L-SOIC JA 163 C/WThermal Resistance, 8L-MSOP JA 206 C/WThermal Resistance, 14L-SOIC JA 120 C/WThermal Resistance, 14L-TSSOP JA 100 C/WNote:The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150 FVDDMCP603 FMCP6031/2/3/4DS22041B-page 6 2008 Microchip Technology PERFORMANCE CURVESNote: Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2,VL = VDD/2, RL = 1 M to VL , CL = 60 pF and CS is tied low.

7 FIGURE 2-1:Input Offset Voltage with VDD = FIGURE 2-2:Input Offset Voltage Drift with VDD = and TA +85 C. FIGURE 2-3:Input Offset Voltage Drift with VDD = and TA +85 2-4:Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2-5:Input Offset Voltage vs. Common Mode Input Voltage with VDD = 2-6:Input Offset Voltage vs. Output :The graphs and tables provided following this note are a statistical summary based on a limited number ofsamples and are provided for informational purposes only. The performance characteristics listed hereinare not tested or guaranteed. In some graphs or tables, the data presented may be outside the specifiedoperating range ( , outside specified power supply range) and therefore outside the warranted -120 -90 -60 -30030 60 90 120 150 Input Offset Voltage ( V)Percentage of Occurences640 SamplesVDD = = VDD/30%2%4%6%8%10%12%14%16%18%20%22%-20 -16 -12 -8-404812 16 20 Input Offset Drift with Temperature ( V/ C)Percentage of Occurences640 SamplesVDD = = VDD/3TA = -40 C to +85 C0%2%4%6%8%10%12%14%-30 -24 -18 -12 -60612182430 Input Offset Drift with Temperature ( V/ C)Percentage of Occurences640 SamplesVDD = = VDD/3TA = +85 C to +125 Mode Input Voltage (V)Input Offset Voltage ( V)TA = -40 CTA = +25 CTA = +85 CTA = +125 CVDD = Mode Input Voltage (V)Input Offset Voltage ( V)TA = -40 CTA = +25 CTA = +85 CTA = +125 CVDD = Voltage (V)Input Offset Voltage ( V)VDD = = = 2008 Microchip Technology 7 mcp6031 /2/3/4 Note.

8 Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2,VL = VDD/2, RL = 1 M to VL, CL = 60 pF and CS is tied 2-7:Input Noise Voltage Density vs. 2-8:Input Noise Voltage Density vs. Common Mode Input 2-9:Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. 2-10:Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Ambient 2-11:Input Bias, Offset Currents vs. Ambient 2-12:Input Bias Current vs. Common Mode Input ,0001E-11E+01E+11E+21E+31E+41E+5 Frequency (Hz)Input Noise Voltage Density(nV/ Hz) Mode Input Voltage (V)Input Noise Voltage Density (nV/ Hz)f = 1 kHzVDD = (Hz)CMRR, PSRR (dB)PSRR-PSRR+CMRRVDD = Temperature ( C)PSRR, CMRR (dB)PSRR (VDD = to , VCM = VSS)CMRR (VDD = ,VCM = to )CMRR (VDD = ,VCM = to )11010010001000025456585105125 Ambient Temperature ( C)Input Bias and Offset Currents (pA)VDD = = VDDI nput Bias CurrentInput Offset Mode Input Voltage (V)Input Bias Current (pA)TA = +125 CTA = +85 CVDD = 8 2008 Microchip Technology : Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2,VL = VDD/2, RL = 1 M to VL, CL = 60 pF and CS is tied low.

9 FIGURE 2-13:Quiescent Current vs Ambient 2-14:Quiescent Current vs. Power Supply Voltage with VCM = 2-15:Quiescent Current vs. Power Supply Voltage with VCM = VSS. FIGURE 2-16:Open-Loop Gain, Phase vs. 2-17:DC Open-Loop Gain vs. Power Supply 2-18:DC Open-Loop Gain vs. Output Voltage 0 255075100125 Ambient Temperature ( C)Quiescent Current ( A/Amplifier)VDD = @ VCM = VDDVDD = @ VCM = VDDVDD = @ VCM = VSSVDD = @ VCM = Supply Voltage (V)Quiescent Current ( A/Amplifier)VCM = VDD TA = +125 CTA = +85 CTA = +25 CTA = -40 Supply Voltage (V)Quiescent Current ( A/Amplifier)VCM = VSS TA = +125 CTA = +85 CTA = +25 CTA = -40 100 1000100001E+05 Frequency (Hz)Open-Loop Gain (V/V)-210-180-150-120-90-60-300 Open-Loop Phase ( )Open-Loop GainOpen-Loop PhaseVDD = Supply Voltage VDD (V)DC Open-Loop Gain (dB)RL = 50 k VSS + < VOUT < VDD - Voltage HeadroomVDD - VOUT or VOUT - VSS (V)DC Open-Loop Gain (dB)RL= 50 k VDD= VDD= Large Signal AOL 2008 Microchip Technology 9 mcp6031 /2/3/4 Note: Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2,VL = VDD/2, RL = 1 M to VL, CL = 60 pF and CS is tied 2-19:Channel-to-Channel Separation vs.

10 Frequency ( MCP6032/4 only). FIGURE 2-20:Gain Bandwidth Product, Phase Margin vs. Common Mode Input 2-21:Gain Bandwidth Product, Phase Margin vs. Ambient 2-22:Gain Bandwidth Product, Phase Margin vs. Ambient 2-23:Ouput Short Circuit Current vs. Power Supply 2-24:Output Voltage Swing vs. ,00010,000 Frequency (Hz)Channel-to-Channel Seperation (dB)Input Mode Input Voltage (V)Gain Bandwidth Product (kHz)020406080100120140160180 Phase Margin ( )Gain Bandwidth ProductPhase MarginVDD = = +1 V/V02468101214161820-50-250255075100 125 Ambient Temperature ( C)Gain Bandwidth Product (kHz)0102030405060708090 Phase Margin ( )Gain Bandwidth ProductPhase MarginVDD = = +1 V/V02468101214161820-50-25 0 255075100125 Ambient Temperature ( C)Gain Bandwidth Product (kHz)0102030405060708090 Phase Margin ( )Gain Bandwidth ProductPhase MarginVDD = = +1 Supply Voltage (V)Output Short Circuit Current (mA)TA = -40 CTA = +25 CTA = +85 CTA = +125 (Hz)Output Voltage Swing (VP-P)VDD = = = 10 2008 Microchip Technology : Unless otherwise indicated, TA = +25 C, VDD = + to + , VSS = GND, VCM = VDD/2, VOUT VDD/2,VL = VDD/2, RL = 1 M to VL, CL = 60 pF and CS is tied 2-25:Output Voltage Headroom vs.