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10-Bit Digital-to-Analog Converters (Rev. E)

,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE200710-BITDIGITAL-TO-ANALOGCO NVERTERS 10-BitCMOSV oltageOutputDACinanTheTLC5615isa10-bitvo ltageoutput8-TerminalPackagedigital-to-a nalogconverter(DAC)withabufferedreferenc einput(highimpedance).TheDAChasan 5 VSingleSupplyOperationoutputvoltagerange thatistwotimesthereference 3-WireSerialInterfacevoltage, High-ImpedanceReferenceInputssimpletouse , InternalPower-OnResetDigitalcontrolofthe TLC5615isoverathree-wireserialbusthatisC MOS compatibleandeasily Pin-CompatibleWiththeMaximMAX515theSPI ,QSPI ,andMicrowire DigitalOffsetandGainAdjustmentoperationf rom0 Cto+70 BatteryOperated/RemoteIndustrialControls characterizedforoperationfrom 40 Cto+85 C.

www.ti.com voltage output (out) digital input timing requirements (see figure 1) output switching characteristics tlc5615c, tlc5615i slas142e– october 1996– revised june 2007

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Transcription of 10-Bit Digital-to-Analog Converters (Rev. E)

1 ,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE200710-BITDIGITAL-TO-ANALOGCO NVERTERS 10-BitCMOSV oltageOutputDACinanTheTLC5615isa10-bitvo ltageoutput8-TerminalPackagedigital-to-a nalogconverter(DAC)withabufferedreferenc einput(highimpedance).TheDAChasan 5 VSingleSupplyOperationoutputvoltagerange thatistwotimesthereference 3-WireSerialInterfacevoltage, High-ImpedanceReferenceInputssimpletouse , InternalPower-OnResetDigitalcontrolofthe TLC5615isoverathree-wireserialbusthatisC MOS compatibleandeasily Pin-CompatibleWiththeMaximMAX515theSPI ,QSPI ,andMicrowire DigitalOffsetandGainAdjustmentoperationf rom0 Cto+70 BatteryOperated/RemoteIndustrialControls characterizedforoperationfrom 40 Cto+85 C.

2 MachineandMotionControlDevicesD,P,ORDGKP ACKAGE CellularTelephones(TOPVIEW)Pleasebeaware thatanimportantnoticeconcerningavailabil ity,standardwarranty, ,QSPI aretrademarksofMotorola, 1996 2007, +DAC10-Bit DAC RegisterPower-ONResetControlLogic16-Bit Shift Register4 DummyBits20s10 Data Bits(LSB)(MSB)REFINAGNDCSSCLKDINOUT(Volt age Output)_+DOUTRR 2 PACKAGE/ORDERINGINFORMATIONTLC5615C,TLC5 615 ISLAS142E OCTOBER1996 ,activelowDOUT4 OSerialdataoutputfordaisychainingAGND5 AnaloggroundREFIN6 IReferenceinputOUT7 ODAC analogvoltageoutputVDD8 PositivepowersupplyForthemostcurrentpack ageandorderinginformation,seethePackageO ptionAddendumattheendofthisdocument, ,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007overoperatingfree-airtemp eraturerange(unlessotherwisenoted)(1)UNI TS upplyvoltage(VDDtoAGND)

3 7 VDigitalinputvoltagerangetoAGND + + + 20mAOperatingfree-airtemperaturerange,TA TLC5615C0 Cto+70 CTLC5615I 40 Cto+85 CStoragetemperaturerange,Tstg 65 Cto+150 CLeadtemperature1,6mm(1/16inch)fromcasef or10seconds+260 C(1) , , , , , 2 VLoadresistance,RL2k TLC5615C070 COperatingfree-airtemperature,TATLC5615I 4085 Coverrecommendedoperatingfree-airtempera turerange,VDD=5V 5%,Vref= (unlessotherwisenoted)STATICDACSPECIFICA TIONSPARAMETERTESTCONDITIONSMINTYPMAXUNI TR esolution10bitsIntegralnonlinearity,endp ointadjusted(INL)Vref= ,See(1) 1 LSBD ifferentialnonlinearity(DNL)Vref= ,See(2) (offseterroratzeroscale)Vref= ,See(3) 3 LSBZero-scale-errortemperaturecoefficien tVref= ,See(4)3ppm/ CEGG ainerrorVref= ,See(5) 3 LSBGain-errortemperaturecoefficientVref= ,See(6)1ppm/ CZeroscale80 PSRRP ower-supplyrejectionratioSee(7)(8)dBGain 80 AnalogfullscaleoutputRL=100k 2 Vref(1023/1024)V(1)Therelativeaccuracyor integralnonlinearity(INL),sometimesrefer redtoaslinearityerror,isthemaximumdeviat ionoftheoutputfromthelinebetweenzeroandf ullscaleexcludingtheeffectsofzerocodeand full-scaleerrors(seetext).

4 Testedfromcode3tocode1024.(2)Thedifferen tialnonlinearity(DNL),sometimesreferredt oasdifferentialerror, (orremainsconstant) (3)Zero-scaleerroristhedeviationfromzero -voltageoutputwhenthedigitalinputcodeisz ero(seetext).(4)Zero-scale-errortemperat urecoefficientisgivenby:EZSTC=[EZS(Tmax) EZS(Tmin)]/Vref 106/(Tmax Tmin).(5)Gainerroristhedeviationfromthei dealoutput(Vref 1 LSB)withanoutputloadof10k excludingtheeffectsofthezero-scaleerror. (6)Gaintemperaturecoefficientisgivenby:E GTC=[EG(Tmax) EG(Tmin)]/Vref 106/(Tmax Tmin).(7)Zero-scale-errorrejectionratio( EZS-RR) (8)Gain-errorrejectionratio(EG-RR) (OUT)DIGITALINPUTTIMINGREQUIREMENTS(SeeF igure1)OUTPUTSWITCHINGCHARACTERISTICSTLC 5615C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 PARAMETERTESTCONDITIONSMINTYPMAXUNITVOV oltageoutputrangeRL=10k 0 VDD (OUT)=2V,RL=2k (low)Outputvoltage,low-levelIO(OUT) (high)Outputvoltage,high-levelIO(OUT) (REFIN)VIInputvoltage0 VDD 2 VriInputresistance10M CiInputcapacitance5pFDIGITALINPUTS(DIN,S CLK,CS) 1 AIILLow-leveldigitalinputcurrentVI=0 1 ACiInputcapacitance8pFDIGITALOUTPUT(DOUT )

5 VOHO utputvoltage,high-levelIO= 2mAVDD 1 VVOLO utputvoltage,low-levelIO= ,Noload,Vref=0150250 AAllinputs=0 VorVDDIDDP owersupplycurrentVDD= ,Noload,Vref= AAllinputs=0 VorVDDANALOGOUTPUTDYNAMICPERFORMANCEVref =1 VPPat1kHz+ ,Signal-to-noise+distortion,S/(N+D)60dBc ode=1111111111(1)(1) (DS)Setuptime,DINbeforeSCLK high45nsth(DH)Holdtime,DINvalidafterSCLK high0nstsu(CSS)Setuptime,CSlowtoSCLK high1nstsu(CS1)Setuptime,CShightoSCLK high50nsth(CSH0)Holdtime,SCLK lowtoCSlow1nsth(CSH1)Holdtime,SCLK lowtoCShigh0nstw(CS)Pulseduration,minimu mchipselectpulsewidthhigh20nstw(CL)Pulse duration,SCLKlow25nstw(CH)Pulseduration, SCLK high25nsPARAMETERTESTCONDITIONSMINNOMMAX UNITtpd(DOUT)Propagationdelaytime,DOUTCL = th(CSH0)tsu(CSS)tw(CH)tw(CL)th(CSH1)tsu( CS1)tw(CS)tpd(DOUT)CSSCLKDINDOUTtsu(DS)t h(DH)NOTES.

6 Input clock, applied at the SCLK terminal, should be inhibited low when CS is high to minimize clock Note ASee Note ASee Note input from preceeding conversion Note CPrevious SCLK falling edgeTLC5615C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007overrecommendedoperatingf ree-airtemperaturerange,VDD=5V 5%,Vref= (unlessotherwisenoted)PARAMETERTESTCONDI TIONSMINTYPMAXUNITANALOGOUTPUTDYNAMICPER FORMANCECL=100pF,SROutputslewrateRL=10k , sTA=+25 ,tsOutputsettlingtimeCL=100pF,(1) sRL=10k ,GlitchenergyDIN=All0stoall1s5nV-sREFERE NCEINPUT(REFIN)ReferencefeedthroughREFIN =1 VPPat1kHz+ (2) 80dBReferenceinputREFIN= + (f 3dB)(1)Settlingtimeisthetimefortheoutput signaltoremainwithin (2)

7 ReferencefeedthroughismeasuredattheDACou tputwithaninputcode=000hexandaVrefinput= + = 5 VVREFIN = VTA = 25 C- Output Source Current - mAIO VO - Output Pullup voltage - Output Sink Current - = 5 VVREFIN = VTA = 25 CIO VO - Output Pulldown voltage - V80- Supply Current -200280240160120400- 60 - 40 - 20020406080 100 120 140A t - Temperature - CVDD = 5 VVREFIN = VTA = 25 CIDD11001 k10 k100 kG - Relative Gain - dB420- 2- 4- 6- 8- 10- 12- 14 VDD = 5 VVREFIN = VPP + V dcTA = 25 CfI - Input Frequency - HzTLC5615C,TLC5615 ISLAS142E OCTOBER1996 (OUT) kSignal-To-Noise + Distortion - dB7030 Frequency - Hz201006010 k100 k300 kVDD = 5 VTA = 25 CVREFIN = 4 VPPD ifferential Nonlinearity LSB Code25551176710230 Integral Nonlinearity LSB Code10 1 TLC5615C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 TYPICALCHARACTERISTICS(continued)

8 SIGNAL-TO-NOISE+ +ResistorStringDAC5 FAGNDVDDOUTREFINDIN SCLKCSDOUTRR_+2 VREFIN 102310242 VREFIN 51310242 VREFIN 5121024+VREFIN2 VREFIN 51110242 VREFIN 11024 TLC5615C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 TheTLC5615usesaresistorstringnetworkbuff eredwithanopampinafixedgainof2toconvert1 0-bitdigitaldatatoanalogvoltagelevels(se efunctionalblockdiagramandFigure9).Theou tputoftheTLC5615isthesamepolarityasthere ferenceinput(seeTable1). (0 Vto2 VREFINO utput),Gain=2 INPUT(1)OUTPUT1111111111(00)::1000000001 (00)1000000000(00)0111111111(00)::000000 0001(00)0000000000(00)0V(1)A10-bitdatawo rdwithtwobitsbelowtheLSBbit(sub-LSB) (SCLK)max+1tw CH )tw CL tp(CS)+16 tw CH )tw CL )tw CS SERIALINTERFACE10 Data Bitsxx12 BitsMSBLSB2 Extra (Sub-LSB) Bitsx = don t care10 Data Bitsxx16 BitsMSBLSB2 Extra (Sub-LSB) Bits4 Upper Dummy Bitsx = don t careTLC5615C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 Theoutputbufferhasarail-to-railoutputwit hshortcircuitprotectionandcandrivea2k , ,theREFIN inputresistanceis10M , , , (CS)islow, , (cascading)function(seedaisy-chainingdev icessection)

9 Isnotused,a12-bitinputdatasequencewithth eMSBfirstcanbeusedasshowninFigure10 A:The DOUT-SI connection is not required for writing tothe TLC5615 but may be used for verifying datatransfer if A:The DOUT-MISO connection is not required for writing to theTLC5615 but may be used for verifying data = 0, CPHA = 0 DAISY-CHAININGDEVICESLINEARITY,OFFSET,AN DGAINERRORUSINGSINGLE-ENDEDSUPPLIESTLC56 15C,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 ThedatafromDOUT requires16fallingedgesoftheinputclockand ,therefore, ,thedatarequires4upperdummybitsbecauseth edatatransferrequires16input-clockcycles plusoneadditionalinput-clockfallingedget oclockoutthedataattheDOUT terminal(seeFigure1).

10 Thetwoextra(sub-LSB) ,QSPI, ;therefore, ,whichhasavariableinputdatalengthfrom8to 16bits, ,providingthatthesetuptime,tsu(CSS)(CSlo wtoSCLK high),isgreaterthanthesumofthesetuptime, tsu(DS),plusthepropagationdelaytime,tpd( DOUT),forpropertiming(seedigitalinputtim ingrequirementssection).ThedataatDINappe arsatDOUT, , , , CodeOutputVoltage0 FAnalog Ground Plane12348765 SAVINGPOWERTLC5615C,TLC5615 ISLAS142E OCTOBER1996 ,becausethemostnegativesupplyrailisgroun d, , (SingleSupply)Thisoffseterror,nottheline arityerror, ,linearityismeasuredbetweenzero-inputcod e(allinputs'0')andfull-scalecode(allinpu ts'1') , ,thezero-scale(offset)erroris ,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 EvenwithCShigh, ,settingtheDACcodetoall0s,sweepingthefre quencyappliedtoREFIN, ,TLC5615 ISLAS142E OCTOBER1996 REVISEDJUNE2007 (August2003) Changed OPTION 1 PACKAGING INFORMATIONO rderable DeviceStatus(1)


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