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BR24G02-3 Series : Memory - Rohm

Datasheet Serial EEPROM Series Standard EEPROM. I2C BUS EEPROM (2-Wire). BR24G02-3 . General Description BR24G02-3 is a 2 Kbit serial EEPROM of I2C BUS Interface. Features Packages W(Typ) x D(Typ) x H(Max). Completely Conforming to the World Standard I2C. BUS. All Controls Available by 2 Ports of Serial Clock (SCL) and Serial Data (SDA). Other Devices than EEPROM can be Connected to the Same Port, Saving Microcontroller Port to Single Power Source Operation Most DIP-T8 TSSOP-B8. Suitable for Battery Use x x x x to Wide Limit of Operating Voltage, Possible FAST MODE 400 KHz Operation Up to 8 Byte in Page Write Mode Bit Format 256 x 8. Self-timed Programming Cycle Low Current Consumption SOP8 TSSOP-B8M. Prevention of Write Mistake x x x x Write (Write Protect) Function Added Prevention of Write Mistake at Low Voltage More than 1 Million Write Cycles More than 40 Years Data Retention Noise Filter Built in SCL / SDA Terminal Initial Delivery State FFh SOP- J8M TSSOP-B8J.

Product structure:Silicon monolithic integrated circuit This product has no designed protection against radioactive rays 1/36 TSZ02201-0R2R0G100170-1-2

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Transcription of BR24G02-3 Series : Memory - Rohm

1 Datasheet Serial EEPROM Series Standard EEPROM. I2C BUS EEPROM (2-Wire). BR24G02-3 . General Description BR24G02-3 is a 2 Kbit serial EEPROM of I2C BUS Interface. Features Packages W(Typ) x D(Typ) x H(Max). Completely Conforming to the World Standard I2C. BUS. All Controls Available by 2 Ports of Serial Clock (SCL) and Serial Data (SDA). Other Devices than EEPROM can be Connected to the Same Port, Saving Microcontroller Port to Single Power Source Operation Most DIP-T8 TSSOP-B8. Suitable for Battery Use x x x x to Wide Limit of Operating Voltage, Possible FAST MODE 400 KHz Operation Up to 8 Byte in Page Write Mode Bit Format 256 x 8. Self-timed Programming Cycle Low Current Consumption SOP8 TSSOP-B8M. Prevention of Write Mistake x x x x Write (Write Protect) Function Added Prevention of Write Mistake at Low Voltage More than 1 Million Write Cycles More than 40 Years Data Retention Noise Filter Built in SCL / SDA Terminal Initial Delivery State FFh SOP- J8M TSSOP-B8J.

2 X x x x SOP- J8 MSOP8. x x x x SSOP-B8 VSON008X2030. x x x x Figure 1. Product structure Silicon monolithic integrated circuit This product has no designed protection against radioactive rays 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 14 001. 1/36. BR24G02-3 Datasheet Absolute Maximum Ratings (Ta=25 C). Parameter Symbol Rating Unit Remark Supply Voltage VCC to + V. (SOP8) Derate by C when operating above Ta=25 C. (SOP-J8M) Derate by C when operating above Ta=25 C. (SOP-J8) Derate by C when operating above Ta=25 C. (SSOP-B8) Derate by C when operating above Ta=25 C. (TSSOP-B8) Derate by C when operating above Ta=25 C. Power Dissipation Pd W. (TSSOP-B8M) Derate by C when operating above Ta=25 C. (TSSOP-B8J) Derate by C when operating above Ta=25 C. (MSOP8) Derate by C when operating above Ta=25 C. (VSON008X2030) Derate by C when operating above Ta=25 C.

3 (DIP-T8) Derate by C when operating above Ta=25 C. Storage Temperature Tstg -65 to +150 C. Operating Temperature Topr -40 to +85 C. The Max value of Input Voltage/Output Voltage is not over Input Voltage /. to VCC+ V When the pulse width is 50ns or less, the Min value of Input Output Voltage Voltage/Output Voltage is not lower than Junction Tjmax 150 C Junction temperature at the storage condition Temperature Electrostatic discharge voltage VESD -4000 to +4000 V. (human body model). Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Memory Cell Characteristics (Ta=25 C, VCC= to ).

4 Limit Parameter Unit Min Typ Max Write Cycles (Note1) 1,000,000 - - Times Data Retention (Note1) 40 - - Years (Note1) Not 100% TESTED. Recommended Operating Ratings Parameter Symbol Rating Unit Power Source Voltage VCC to V. Input Voltage VIN 0 to VCC. DC Characteristics (Unless otherwise specified, Ta=-40 C to +85 C, VCC= to ). Limit Parameter Symbol Unit Conditions Min Typ Max Input High Voltage1 VIH1 - VCC+ V VCC Input Low Voltage1 VIL1 (Note2) - + V VCC Input High Voltage2 VIH2 - VCC+ V VCC Input Low Voltage2 VIL2 (Note2) - + V VCC Output Low Voltage1 VOL1 - - V IOL= , VCC (SDA). Output Low Voltage2 VOL2 - - V IOL= , VCC (SDA). Input Leakage Current ILI -1 - +1 A VIN=0 to VCC. Output Leakage Current ILO -1 - +1 A VOUT=0 to VCC (SDA). VCC= , fSCL=400kHz, tWR=5ms, Supply Current (Write) ICC1 - - mA. Byte write, Page write VCC= , fSCL=400kHz Supply Current (Read) ICC2 - - mA.

5 Random read, current read, sequential read VCC= , SDA SCL=VCC. Standby Current ISB - - A. A0, A1, A2=GND, WP=GND. (Note2) When the pulse width is 50ns or less, it is 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 15 001. 2/36. BR24G02-3 Datasheet AC Characteristics (Unless otherwise specified, Ta=-40 C to +85 C, VCC= to ). Limit Parameter Symbol Unit Min Typ Max Clock Frequency fSCL - - 400 kHz Data Clock High Period tHIGH - - s Data Clock Low Period tLOW - - s SDA, SCL (INPUT) Rise Time (Note1) tR - - s (Note1). SDA, SCL (INPUT) Fall Time tF1 - - s SDA (OUTPUT) Fall Time (Note1) tF2 - - s Start Condition Hold Time tHD:STA - - s Start Condition Setup Time tSU:STA - - s Input Data Hold Time tHD:DAT 0 - - ns Input Data Setup Time tSU:DAT 100 - - ns Output Data Delay Time tPD - s Output Data Hold Time tDH - - s Stop Condition Setup Time tSU:STO - - s Bus Free Time tBUF - - s Write Cycle Time tWR - - 5 ms Noise Spike Width (SDA and SCL) tI - - s WP Hold Time tHD:WP - - s WP Setup Time tSU:WP - - s WP High Period tHIGH:WP - - s (Note1) Not 100% TESTED.

6 Condition Input data level: VIL= VCC VIH= VCC. Input data timing reference level: VCC. Output data timing reference level: VCC. Rise/Fall time: 20ns Serial Input / Output Timing tR tF1 tHIGH. SCL 70% 70% 70% 70% 70% 70%. 30% 30% 30% 30%. tHD:STA tLOW. tHD:DAT DATA(1) DATA(n). tSU:DAT. 70%. 70% 70% 70% D1 D0 ACK ACK. 70%. 30% 30% tWR. SDA. ( ) tBUF tPD tDH. (INPUT). 30% 30%. 70% 70%. SDA. 30% 30% 30%. ( ). (OUTPUT) tSU:WP. tSU:WP tHD:WP. tHD:WP. SDA tF2. Input read at the rise edge of SCL 70%. 30%. 70%. STOP. STOP CONDITION. CONDITION. (output) 30%. Data output in sync with the fall of SCL. Figure 2-(a). Serial Input / Output Timing Figure 2-(d). WP Timing at Write Execution 70% DATA(1). DATA(1) DATA(n). DATA(n). 70% 70%. 70%. D1. D1 D0. D0 ACK. ACK ACK. ACK 70%. tSU:STA tHD:STA tSU:STO. tHIGH:WP. tHIGH:WP tWR. tWR. 70%. 30% 30% Fig1-(4) Write70%. cycle timing 70% 70%.

7 70%. START CONDITION STOP CONDITION. Fig1-(5) WP timing at write execution 30% 30%. Figure 2-(b). Start-Stop Bit Timing Fig1-(6)2-(e). Figure WP timing at write at WP Timing cancel Write Cancel START CONDITION STOP CONDITION. 70% 70%. D0 ACK. write data tWR. (n-th address). STOP CONDITION START CONDITION. Figure 2-(c). Write Cycle Timing Fig1-(5) WP timing at write execution Fig1-(6) WP timing at write cancel 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 15 001. 3/36. BR24G02-3 Datasheet Block Diagram A0 1 2kbit EEPROM Array 8 VCC. 8bit Address Word Address Data A1 2 8bit 7 WP. Decoder Register Register START STOP. A2 3 Control circuit 6 SCL. ACK. High Voltage Power Source GND 4 Generating circuit Voltage Detection 5 SDA. Figure 3. Block Diagram Pin Configuration (TOP VIEW). A0 1 8 VCC. A1 2 7 WP. BR24G02-3 . A2 3 6 SCL. GND 4 5 SDA.

8 Pin Descriptions Terminal Input/. Descriptions Name Output A0 Input Slave address setting*. A1 Input Slave address setting*. A2 Input Slave address setting*. GND - Reference voltage of all input / output, 0V. Input/. SDA Serial data input serial data output output SCL Input Serial clock input WP Input Write protect terminal VCC - Connect the power source. *A0, A1 and A2 are not allowed to use as open. 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 15 001. 4/36. BR24G02-3 Datasheet Typical Performance Curves 6 6. Ta=-40 C. Ta= 25 C. 5 Ta= 85 C 5 Ta=-40 C. IL1,2 (V). Ta= 25 C. IH1,2 (V). Ta= 85 C. 4 4. Input Low Voltage1,2: V. Input High Voltage : V. 3 3. SPEC. 2 2. 1 1. SPEC. 0 0. 0 1 2 3 4 5 6 0 1 2 3 4 5 6. Supply Voltage: Vcc(v) Supply Voltage: Vcc(v). Figure 4. Input High Voltage1,2 vs Supply Voltage Figure 5. Input Low Voltage1,2 vs Supply Voltage (A0, A1, A2, SCL, SDA, WP) (A0, A1, A2, SCL, SDA, WP).

9 1 1. Ta=-40 C. Ta= 25 C Ta=-40 C. OL2 (V). OL1 (V). Ta= 85 C. Ta= 25 C. Ta= 85 C. Output Low Voltage1: V. Output Low Voltage2: V. SPEC. SPEC. 0 0. 0 1 2 3 4 5 6 0 1 2 3 4 5 6. Output Low Current: IOL(mA) Output Low Current: IOL(mA). Figure 6. Output Low Voltage1 vs Output Low Current Figure 7. Output Low Voltage2 vs Output Low Current (VCC= ) (VCC= ). 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 15 001. 5/36. BR24G02-3 Datasheet Typical Performance Curves continued SPEC. SPEC. 1 1. LO ( A). LI ( A). Ta=-40 C. Ta= 25 C Ta=-40 C. Output Leakage Current: I. Ta= 25 C. Input Leakage Current: I. Ta= 85 C. Ta= 85 C. 0 0. 0 1 2 3 4 5 6 0 1 2 3 4 5 6. Supply Voltage: Vcc(V) Supply Voltage: Vcc(v). Figure 8. Input Leakage Current vs Supply Voltage Figure 9. Output Leakage Current vs Supply Voltage (A0, A1, A2, SCL, WP) (SDA). 3 SPEC. CC2 (mA).

10 CC1 (mA). SPEC. 2 Supply Current (Read): I. Ta=-40 C. Supply Current (Write): I. Ta= 25 C. Ta= 85 C. Ta=-40 C. Ta= 25 C. Ta= 85 C. 1 0 0. 0 1 2 3 4 5 6 0 1 2 3 4 5 6. Supply Voltage: Vcc(V) Supply Voltage: Vcc(V). Figure 10. Supply Current (Write) vs Supply Voltage Figure 11. Supply Current (Read) vs Supply Voltage (fSCL=400kHz) (fSCL=400kHz). 2013 ROHM Co., Ltd. All rights reserved. TSZ02201-0R2R0G100170-1-2. TSZ22111 15 001. 6/36. BR24G02-3 Datasheet Typical Performance Curves continued 10000. SPEC. 2 1000. SCL (kHz). SB ( A). SPEC. 100. Standby Current: I. Ta=-40 C. Clock Frequency: f Ta= 25 C. Ta= 85 C. Ta=-40 C. 1 10 Ta= 25 C. Ta= 85 C. 1. 0 0 1 2 3 4 5 6 0 1 2 3 4 5 6. Supply Voltage: Vcc(V) Supply Voltage: Vcc(V). Figure 12. Standby Current vs Supply Voltage Figure 13. Clock Frequency vs Supply Voltage 1 SPEC. LOW ( s). HIGH ( s). Data Clock Low Period : t SPEC.


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