DC Parameters: Input Offset Voltage (V - TI.com

1 Application ReportSLOA059 March 20011DC parameters : Input Offset Voltage (VIO)Richard PalmerAdvanced Analog ProductsABSTRACTThe Input Offset Voltage , VIO, is a common dc parameter in operational amplifier (op amp)specifications. This report aims to familiarize the engineer by discussing the basics andmodern aspects of VIOby providing a definition and a detailed explanation of causes ofVIOfor BJT, BiFET, and CMOS devices. Discussion centers around measurementtechniques, data sheet specifications, and the effect of VIOon circuit design and the trimmethods to correct Offset Voltage Temperature Drift in the Major Device Types.

2 CMOS ..85 Manufacturer Measurement, Trim, and Specification of Measurement .. Circuit Design and Methods of AC DC Feedback .. Internal Calibration .. External ..22 References ..23 FiguresFigure Op-Amp Model and Model parameters ..3 Figure Op-Amp of VIOfor the TLV2721 ..4 Figure Differential-Pair Amplifier. Q1 and Q2 Are BJT, FET or MOS..5 Figure Transistor Differential-Pair Circuit. (a) Basic Circuit and (b) General CircuitUsed to Calculate Servo-Loop Test Circuit ..10 Figure of VIOD rift Over 0 70 C ..12 Figure VICfor (a) TLC071 and (b) TLC081 Op Amps.

3 14 Figure With Common Mode Input Voltage (VIC) for (a) the TLV247x and (b) theTLV2731 ..15 SLOA0592DC parameters : Input Offset Voltage (VIO)Figure 10. Inverting Op-Amp Circuit With 15 Figure 11. AC Coupled Inverting Amplifier .. 16 Figure 12. General Form of DC Feedback 18 Figure 13. Simplified Block Diagram of the TLC2654 Chopper-Stabilized Amplifier .. 19 Figure 14. Block Diagram of Channel One of the 20 Figure 15. Typical Null Configuration of an Amplifier .. 21 Figure 16. VIOA djustment With (a) Potentiometer and (b) Low Temperature 21 TablesTable of Input Offset Voltage and Drift Per Device Process.

4 6 Table ofVIOS pecifications Taken From TLE2021 Data Sheet (SLOS191) .. 11 Table amps find extensive use in a wide variety of circuits, and their appropriate specification for aparticular application requires knowledge of relevant data-sheet parameters . Data sheetspecifications are divided into two general categories: dc parameters and ac parameters . The dcparameters represent internal errors that occur as a result of mismatches between devices andcomponents inside the op amp. These errors are always present from the time the power isturned on ( , before, during and after any Input signal is applied), and they determine howprecisely the output matches the ideal op-amp model.

5 Thus the precision of the op amp isdetermined by the magnitude of the dc objective of this report is to provide the information necessary for the designer tounderstand each parameter; what it is, what causes it, and how it is measured, trimmed 1 presents an ideal op amp together with a table of ideal parameters . The generalassumptions listed in the table simplify design analysis and provide a good, first orderapproximation that is reasonable when the op amp limits are not being pushed. Mostapplications, however, utilize the op amp to the fullest extent for one or more parameters andrequire more detailed analysis.

6 It is then that the nonideal, or real, op amp of Figure 2 must beused. SeeUnderstanding Basic Analog Ideal Op Amps, (SLAA068) for more information on theideal op parameters : Input Offset Voltage (VIO)3 VEaVERIROV+V-VOUTPARAMETERVALUEGain (a) Input resistance (RI) Output resistance (RO)0 CMRR KSVR VE0 Figure Op-Amp Model and Model ParametersIB-RoRICIaVEIn-VSupplykSVRVIOV nVICCMRRIB+In+IIOVEV+V-VOUTF igure Op-Amp Model2 Input Offset Voltage DefinedThe Input Offset Voltage is defined as the Voltage that must be applied between the two inputterminals of the op amp to obtain zero volts at the output.

7 Ideally the output of the op amp shouldbe at zero volts when the inputs are grounded. In reality the Input terminals are at slightlydifferent dc potentials. VIOis symbolically represented by a Voltage source that is in series witheither the positive or negative Input terminal (it is mathematically equivalent either way). It canbe either negative or positive in polarity, varying from device to device (die to die) of the samewafer lot. Figure 3 shows the distribution of VIOmeasured in one wafer lot of the TLV2721 opamp as an example of the variance that VIOmay parameters : Input Offset Voltage (VIO) of Amplifiers - % Input Offset Voltage - mVVIODD= CAT545 Amplifiers From 1 Wafer LotFigure of VIOfor the TLV2721 VIOis considered to be a dc error and is present from the moment that power is applied until it isturned off, with or without an Input signal.

8 It occurs during the biasing of the op amp and its effectcan only be reduced, not Cause of VIOThe cause of Input Offset Voltage is well known it is due to the inherent mismatch of the inputtransistors and components during fabrication of the silicon die, and stresses placed on the dieduring the packaging process (minor contribution). These effects collectively produce amismatch of the bias currents that flow through the Input circuit, and primarily the Input devices,resulting in a Voltage differential at the Input terminals of the op amp. VIOhas been reduced withmodern manufacturing processes through increased matching and improved package materialsand Input stage of most op amps consists of a differential-pair amplifier.

9 A simplified version isshown in Figure 4, where Q1(+ or noninverting Input terminal) and Q2( or inverting inputterminal) can be BJT, FET or MOS transistors. The Input terminals of the op amp are the bases(BJT) or gates (FET, MOS) of these transistors. The current source biases the transistors, andideally each leg of the circuit is balanced so that one half of the current flows through eachtransistor (IQ1=IQ2=IREF/2) and the inverting and noninverting inputs are at the same in R, Q1,andQ2unbalance this current. The base (gate) voltages of the transistorsthen become unequal, creating the small differential Voltage , parameters : Input Offset Voltage (VIO)5Q1Q2 IREFRRVCCVCCVOUT=AVIO=A(V+-V-)V+V-Figure Differential-Pair Amplifier.

10 Q1 and Q2 Are BJT, FET or the op amp is open loop, this small differential Voltage is multiplied by the large internalgain of the op amp. At the very least, the output dynamic range will be greatly , however, the output of the op amp is driven to one of the power supply rails, saturatingthe device. When the op amp is operated closed loop the differential Voltage is multiplied by thenoninverting closed loop gain of the op amp, which is set by the circuit Temperature Drift in the Major Device TypesThere are three major manufacturing processes in which most op amps can be grouped: bipolar,BiFET, and CMOS.