Example: air traffic controller

DS STM32F42x 43x step2 - STMicroelectronics

This is information on a product in full production. January 2018 DocID024030 Rev 101/239 STM32F427xx STM32F429xx32b Arm Cortex -M4 MCU+FPU, 225 DMIPS, up to 2MB Flash/256+4KB RAM, USBOTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFTD atasheet - production dataFeatures Core: Arm 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator ) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/MHz (Dhrystone ), and DSP instructions Memories Up to 2 MB of Flash memory organized into two banks allowing read-while-write Up to 256+4 KB of SRAM including 64-KB of CCM (core coupled memory) data RAM Flexible external memory controller with up to 32-bit data bus.

• 2×12-bit D/A converters • General-purpose DMA: 16-stream DMA controller with FIFOs and burst support • Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input • Debug mode – SWD & JTAG interfaces – Cortex-M4 Trace Macrocell™

Tags:

  Converter

Information

Domain:

Source:

Link to this page:

Please notify us if you found a problem with this document:

Other abuse

Transcription of DS STM32F42x 43x step2 - STMicroelectronics

1 This is information on a product in full production. January 2018 DocID024030 Rev 101/239 STM32F427xx STM32F429xx32b Arm Cortex -M4 MCU+FPU, 225 DMIPS, up to 2MB Flash/256+4KB RAM, USBOTG HS/FS, Ethernet, 17 TIMs, 3 ADCs, 20 com. interfaces, camera & LCD-TFTD atasheet - production dataFeatures Core: Arm 32-bit Cortex -M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator ) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/MHz (Dhrystone ), and DSP instructions Memories Up to 2 MB of Flash memory organized into two banks allowing read-while-write Up to 256+4 KB of SRAM including 64-KB of CCM (core coupled memory) data RAM Flexible external memory controller with up to 32-bit data bus.

2 SRAM, PSRAM, SDRAM/LPSDR SDRAM, Compact Flash/NOR/NAND memories LCD parallel interface, 8080/6800 modes LCD-TFT controller with fully programmable resolution (total width up to 4096 pixels, total height up to 2048 lines and pixel clock up to 83 MHz) Chrom-ART Accelerator for enhanced graphic content creation (DMA2D) Clock, reset and supply management V to V application supply and I/Os POR, PDR, PVD and BOR 4-to-26 MHz crystal oscillator Internal 16 MHz factory-trimmed RC (1% accuracy) 32 kHz oscillator for RTC with calibration Internal 32 kHz RC with calibration Low power Sleep, Stop and Standby modes VBAT supply for RTC, 20 32 bit backup registers + optional 4 KB backup SRAM 3 12-bit, MSPS ADC: up to 24 channels and MSPS in triple interleaved mode 2 12-bit D/A converters General-purpose DMA: 16-stream DMA controller with FIFOs and burst support Up to 17 timers.

3 Up to twelve 16-bit and two 32-bit timers up to 180 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input Debug mode SWD & JTAG interfaces Cortex-M4 Trace Macrocell Up to 168 I/O ports with interrupt capability Up to 164 fast I/Os up to 90 MHz Up to 166 5 V-tolerant I/Os Up to 21 communication interfaces Up to 3 I2C interfaces (SMBus/PMBus) Up to 4 USARTs/4 UARTs ( Mbit/s, ISO7816 interface, LIN, IrDA, modem control) Up to 6 SPIs (45 Mbits/s), 2 with muxed full-duplex I2S for audio class accuracy via internal audio PLL or external clock 1 x SAI (serial audio interface) 2 CAN ( Active) and SDIO interface Advanced connectivity USB full-speed device/host/OTG controller with on-chip PHY USB high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII 8- to 14-bit parallel camera interface up to 54 Mbytes/s True random number generator CRC calculation unit RTC: subsecond accuracy, hardware calendar 96-bit unique IDLQFP100 (14 14 mm)LQFP144 (20 20 mm)UFBGA176 (10 x 10 mm)LQFP176 (24 24 mm)LQFP208 (28 x 28 mm)WLCSP143 TFBGA216 (13 x 13 mm)UFBGA169 (7 7 mm)&"'!

4 STM32F429xx2/239 DocID024030 Rev 10 Table 1. Device summaryReferencePart numberSTM32F427xxSTM32F427VG, STM32F427ZG, STM32F427IG, STM32F427AG, STM32F427VI, STM32F427ZI, STM32F427II, STM32F427 AISTM32F429xxSTM32F429VG, STM32F429ZG, STM32F429IG, STM32F429BG, STM32F429NG, STM32F429AG, STM32F429VI, STM32F429ZI, STM32F429II,, STM32F429BI, STM32F429NI,STM32F429AI, STM32F429VE, STM32F429ZE, STM32F429IE, STM32F429BE, STM32F429 NEDocID024030 Rev 103/239 STM32F427xx STM32F429xxContents6 Contents1 Introduction .. 132 Description .. compatibility throughout the family .. 183 Functional overview .. Cortex -M4 with FPU and embedded Flash and SRAM .. real-time memory accelerator (ART Accelerator ).

5 Protection unit .. Flash memory .. (cyclic redundancy check) calculation unit .. SRAM .. bus matrix .. controller (DMA) .. memory controller (FMC) .. controller (available only on STM32F429xx) .. Accelerator (DMA2D) .. vectored interrupt controller (NVIC) .. interrupt/event controller (EXTI) .. and startup .. modes .. supply schemes .. supply supervisor .. reset ON .. reset OFF .. regulator .. ON .. OFF .. ON/OFF and internal reset ON/OFF availability .. clock (RTC), backup SRAM and backup registers .. modes .. operation .. 34 ContentsSTM32F427xx STM32F429xx4/239 DocID024030 Rev and watchdogs .. timers (TIM1, TIM8).

6 Timers (TIMx) .. timers TIM6 and TIM7 .. watchdog .. watchdog .. timer .. circuit interface ( I2C) .. synchronous/asynchronous receiver transmitters (USART) .. peripheral interface (SPI) .. sound (I2S) .. Audio interface (SAI1) .. PLL (PLLI2S) .. and LCD PLL(PLLSAI) .. digital input/output interface (SDIO) .. MAC interface with dedicated DMA and IEEE 1588 support .. area network (bxCAN) .. serial bus on-the-go full-speed (OTG_FS) .. serial bus on-the-go high-speed (OTG_HS) .. camera interface (DCMI) .. number generator (RNG) .. input/outputs (GPIOs) .. converters (ADCs) .. sensor .. converter (DAC) .. wire JTAG debug port (SWJ-DP).

7 Trace Macrocell .. 444 Pinouts and pin description .. 455 Memory mapping .. 866 Electrical characteristics .. conditions .. and maximum values .. 91 DocID024030 Rev 105/239 STM32F427xx values .. curves .. capacitor .. input voltage .. supply scheme .. consumption measurement .. maximum ratings .. conditions .. operating conditions .. external capacitor .. conditions at power-up / power-down (regulator ON) .. conditions at power-up / power-down (regulator OFF) .. and power control block characteristics .. switching characteristics .. current characteristics .. time from low-power modes .. clock source characteristics .. clock source characteristics.

8 Characteristics .. spread spectrum clock generation (SSCG) characteristics .. characteristics .. characteristics .. maximum ratings (electrical sensitivity) .. current injection characteristics .. port characteristics .. pin characteristics .. timer characteristics .. interfaces .. ADC characteristics .. sensor characteristics .. monitoring characteristics .. voltage .. electrical characteristics .. characteristics .. interface (DCMI) timing specifications .. controller (LTDC) characteristics .. MMC card host interface (SDIO) characteristics .. 196 ContentsSTM32F427xx STM32F429xx6/239 DocID024030 Rev characteristics .. 1977 Package information.

9 Package information .. package information .. package information .. package information .. package information .. package information .. +25 package information .. package information .. characteristics .. 2258 Part numbering .. 226 Appendix A Recommendations when using internal reset OFF .. conditions .. 227 Appendix B Application block diagrams .. OTG full speed (FS) interface solutions .. OTG high speed (HS) interface solutions .. interface solutions.. 2319 Revision history .. 233 DocID024030 Rev 107/239 STM32F427xx STM32F429xxList of tables9 List of tablesTable summary .. 2 Table and STM32F429xx features and peripheral counts .. 16 Table regulator configuration mode versus device operating mode.

10 29 Table ON/OFF and internal reset ON/OFF availability.. 32 Table regulator modes in stop mode .. 33 Table feature comparison .. 35 Table of I2C analog and digital filters .. 37 Table feature comparison .. 38 Table used in the pinout table .. 53 Table and STM32F429xx pin and ball definitions .. 53 Table pin definition .. 72 Table and STM32F429xx alternate function mapping .. 75 Table and STM32F429xx register boundary addresses.. 87 Table characteristics .. 93 Table characteristics .. 94 Table characteristics.. 94 Table operating conditions .. 95 Table depending on the operating power supply range .. 97 Table operating conditions .. 97 Table conditions at power-up / power-down (regulator ON).


Related search queries