Failsafe in RS-485 data buses - Texas Instruments

1 16 analog Applications JournalAnalog and Mixed-Signal 2004 Failsafe in RS-485 data busesIntroductionAfter bus-pin electrical overstress, the second most common cause of inquiries to the Texas Instruments (TI)Interface Applications Group is the unanticipated responseof differential, and in particular RS-485 *, line receivers toloss of input signal. When the response of a circuit isdesigned to provide a known state under this condition, itis commonly referred to as Failsafe . The intent of thisarticle is to share the answers to many of these questionsand to help the reader avoid similar there are many different data transmission stan-dards that employ differential signaling, the scope of thisarticle is limited to RS-485 -compatible circuits and standardusage.

2 Many of the principles detailed here can be appliedto other differential signaling schemes with appropriateadaptation of the system-level will first develop a bus electrical model and analyzereceiver responses to and reasons for no input we will investigate adding a signal and redefining thebus logic states through external and integrated options toprovide Failsafe modelA standard RS-485 bus is a single balanced-pair transmis-sion line terminated at each end by a resistance equal tothe characteristic impedance of the line. RS-485 line drivers,receivers, or transceivers are distributed along the trans-mission line to share data over the common bus (seeFigure 1).

3 If the local ground connection of any line driver isselected as the zero potential reference point and noisesources are included, the equivalent circuit of the busappears as shown in Figure 2. VOAand VOBare the outputvoltages of the line driver, RINEQis the equivalent inputresistance of all the connected line circuits to their localground, Vncmis the common-mode noise voltage betweenthe driver ground and receiver grounds (C), and Vndiffisthe differential noise voltage. We are assuming that theeffect of the transmission line resistance on the node voltages is we are primarily concerned with the voltagebetween A and B, it is convenient to make our zero potential at the B node and to substitute the differencevoltage source (VOD) for VOA VOB, as shown in Figure of the receiver differential input voltage, VID, is then trivial: Vndiff+ Instruments IncorporatedInterfaceBy Kevin Gingerich (Email: Linear/Interface* RS-485 is specified in ANSI TIA/EIA-485-A and ISO/IEC-8482 1.)

4 Standard RS-485 busVOB ZOVndiffRINEQRINEQVncmABCVOA+ + Figure 2. Electrical equivalent circuit for thestandard RS-485 busVOB ZOVndiffRINEQRINEQVncmABVID+ CVOD+ + Figure 3. Redrawn RS-485 bus equivalent circuitTexas Instruments IncorporatedInterface17 analog Applications Journal3Q and Mixed-Signal ProductsDifferential receiver responsesThe input signal to the transmission line is the driver output voltage; the differential receiver must detect whatcomes out. The first parameter to consider for a receiveris the differential input voltage threshold, VIT, as it definesthe voltage needed to place the receiver output in a highor low state.

5 The specified maximum and minimum VITestablish the limits for VIT, and difference voltages aboveor below them assure that the receiver will indicate a validlogic state at its output. RS-485 requires a maximum VITof200 mV and a minimum of 200 mV under all operatingconditions and common-mode input voltages. Figure 4shows a graphical representation of the differential voltagestates transition region between V and V. Thearrows indicate that the valid differential input voltageextends to 6 V or 6 this reason, it is common to employ some positivefeedback to the differential amplifier input stages to providesome hysteresis in the input-to-output transfer makes the positive-going differential threshold higherthan the negative-going threshold and requires that thedifference be exceeded to switch to the opposite decreases the chance of oscillation from differentialnoise but does not provide a predictable output state.

6 Asthe output will remain in the last state prior to input a steady-state bias signalSince the VODsource in Figure 3 defines the bus state, disconnecting it or a zero-volt output leaves the standardbus state to be determined by the differential noise in thesystem or indeterminate. Operating scenarios that maydisconnect VODfrom the circuit would include physicalremoval or, much more commonly, disabling the driverwhile bus access is being granted to another driver on thebus. A zero-volt output may occur due to a short circuitbetween signal wires or damage to a line problem of keeping the bus in a known state whenno active driver is connected may be solved by adding asteady-state differential voltage to the bus.

7 This in effectadds a driver that will not be switched, disabled, or dis-connected. This Failsafe driver is added to the circuitmodel in Figure 5 as voltage sources VFAand VFB, alongwith their respective source resistances RFAand RFB. Thefailsafe driver is referenced to node C since VODrepre-sents any driver on the circuit and the two grounds maynot be at the same potential. Note that S1 and S2 areadded to show the driver disconnected from the (V) 4. RS-485 differential voltage statesVOBVFBVFA ZOVndiffRINEQRFBRFARINEQVncmAS1S2 BCVOD+ +++ VID+ Figure 5. Failsafe driver added to equivalentbus circuitA differential input voltage between the maximum andminimum threshold lies in the transition region and resultsin an indeterminate output state.

8 The output may be high,low, or on its way between states. Consider a line receiveras a differential amplifier with a gain of about 100,000. VITis the input voltage where the output would be one-half ofthe way between high and low; and, with no feedback forhysteresis, it takes only a few tens of microvolts above orbelow the threshold for the output to switch to a high orlow state. There is likely this much in differential noise inthe system that, if near the threshold, could cause oscilla-tion of the Instruments IncorporatedInterface18 analog Applications JournalAnalog and Mixed-Signal 2004 The effect of adding the Failsafe driver is determined byshorting all voltage sources other than VFAand VFBandsumming the currents at nodes A and B as with the algebra details and solving for VA VBgives usSince circuit balance requires that RFA= RFB= RF, thefailsafe differential bias voltagethen becomesNormally.

9 Only a 5- or supply is available for thefailsafe voltage sources VFAor VFB; and, from Equation 1,we know they cannot be the same and generate a differ-ence voltage. Therefore, we set VFB= 0 V in the equationfor single-supplied Failsafe differential voltage,Note that we could just as well have made VFA= 0 V andgenerated a negative Failsafe bias applying Equation 2, we establish a constraintfor RF. In Figure 5, the added RFis in parallel with RINEQ,which represents the equivalent resistance of the line circuits attached to the bus. This additional load has theeffect of requiring more output current from a bus driverwith the common-mode voltage VCM.

10 Since standard RS-485line drivers are required to handle only 375- common-mode loads, the parallel combination of RFand RINEQ islimited by137511>+ RRFINEQ.(2)VVVRR RRRZZABFAFF INEQINEQFOO =+ ++ 11112 2222.(1)VVVRR RVRR RRRABFAFF INEQFBFF INEQINEQ =+ + +111111 FFOOZZ+ RVRR RRABFAFAFBINEQFBFBFAINEQIN =+ + 11111 EEQFAOINEQFBOORZ R RZ Z 121 12 + = + =121200 Applying this constraint gives us the equation for the maximally loaded-bus Failsafe voltage,The Failsafe bias voltage VA VBis chosen and the RFisdetermined with the appropriate substitutions for VFAandZO. For example, a desired Failsafe bias on an RS-485bus segment with a 120- characteristic impedance cable,differentially terminated with 120- resistors at each end,and a 5-V 5% supply would give us the values of ZO= 120 ,VFA= V, and VA VB= V.