MCP3002 - 2.7V Dual Channel 10-Bit A/D Converter with SPI ...

1 2000-2011 Microchip Technology 1 MCP3002 Features 10-Bit resolution 1 LSB maximum DNL 1 LSB maximum INL Analog inputs programmable as single-ended or pseudo-differential pairs On-chip sample and hold SPI serial interface (modes 0,0 and 1,1) Single supply operation: - 200 ksps max sampling rate at VDD = 5V 75 ksps max sampling rate at VDD = Low power CMOS technology:- 5 nA typical standby current, 2 A maximum- 550 A maximum active current at 5V Industrial temperature range: -40 C to +85 C 8-pin MSOP, PDIP, SOIC and TSSOP packagesApplications Sensor Interface Process Control Data Acquisition Battery Operated SystemsFunctional Block DiagramDescriptionThe MCP3002 is a successive approximation 10-bitanalog-to-digital (A/D) Converter with on-board sampleand hold circuitry. The MCP3002 is programmable to provide a singlepseudo-differential input pair or dual single-endedinputs.

2 Differential Nonlinearity (DNL) and IntegralNonlinearity (INL) are both specified at 1 LSB. Com-munication with the device is done using a simple serialinterface compatible with the SPI protocol. The deviceis capable of conversion rates of up to 200 ksps at 5 Vand 75 ksps at The MCP3002 operates over a broad voltage range, to Low-current design permits operation witha typical standby current of 5 nA and a typical activecurrent of 375 MCP3002 is offered in 8-pin MSOP, PDIP, TSSOPand 150 mil SOIC TypesComparatorSampleand Hold10-Bit SARDACC ontrol LogicCS/SHDNVSSVDDCLKDOUTS hiftRegisterCH0 ChannelMuxInputCH1 DINMCP300212348765CH0CH1 VSSCS/SHDNVDD/VREFCLKDOUTDINMSOP, PDIP, SOIC, dual Channel 10-Bit A/D Converterwith SPI Serial InterfaceMCP3002DS21294E-page 2 2000-2011 Microchip Technology CHARACTERISTICSA bsolute Maximum Ratings Inputs and Outputs to VDD+ C to +150 CAmbient temperature with power C to +150 CESD Protection On All Pins (HBM) 4kV Notice.

3 Stresses above those listed under AbsoluteMaximum Ratings may cause permanent damage to thedevice. This is a stress rating only and functional operation ofthe device at those or any other conditions above thoseindicated in the operational listings of this specification is notimplied. Exposure to maximum rating conditions for extendedperiods may affect device CHARACTERISTICSAll parameters apply at VDD = 5V, TA = -40 C to +85 C, fSAMPLE = 200 ksps and fCLK = 16*fSAMPLE, unless otherwise values apply for VDD = 5V, TA = +25 C, unless otherwise noted. PARAMETERSYMMINTYPMAXUNITSCONDITIONSC onversion Rate:Conversion TimeTCONV 10clock cyclesAnalog Input Sample cyclesThroughput RateFSAMPLE 20075kspskspsVDD = 5 VVDD = Accuracy:Resolution10bitsIntegral NonlinearityINL 1 LSBD ifferential Nonlinearity DNL 1 LSBNo missing codes overtemperatureOffset Error Error 1 LSBD ynamic Performance:Total Harmonic DistortionTHD -76 dBVIN = to @1 kHzSignal to Noise and Distortion (SINAD)SINAD 61 dBVIN = to @1 kHzSpurious Free Dynamic RangeSFDR 78 dBVIN = to @1 kHzAnalog Inputs:Input Voltage Range for CH0 or CH1 in Single-ended Mode VSS VDDVI nput Voltage Range for IN+ in Pseudo-Differential ModeIN+IN- VDD+IN-Input Voltage Range for IN- in Pseudo-Differential ModeIN-VSS-100 VSS+100mVLeakage Current 1 ASwitch ResistanceRSS 1K See Figure 4-1 Sample CapacitorCSAMPLE 20 pFSee Figure 4-1 Note 1.

4 This parameter is established by characterization and not 100% :The sample cap will eventually lose charge, especially at elevated temperatures, therefore fCLK 10 kHz for temperatures at or above 70 C. 2000-2011 Microchip Technology 3 MCP3002 Digital Input/Output:Data Coding FormatStraight BinaryHigh Level Input VDD VLow Level Input VoltageVIL VDDVHigh Level Output VIOH = -1 mA, VDD = Level Output VoltageVOL VIOL = 1 mA, VDD = Leakage CurrentILI-10 10 AVIN = VSS or VDDO utput Leakage CurrentILO-10 10 AVOUT = VSS or VDDPin Capacitance(All Inputs/Outputs)CIN, COUT 10 pFVDD = (Note 1)TA = 25 C, f = 1 MHzTiming Parameters:Clock FrequencyfCLK = 5V (Note 2)VDD = (Note 2)Clock High TimetHI140 nsClock Low TimetLO140 nsCS Fall To First Rising CLK EdgetSUCS100 nsData Input Setup TimetSU50 nsData Input Hold TimetHD50 nsCLK Fall To Output Data ValidtDO 125200nsnsVDD = 5V, see Figure 1-2 VDD = , see Figure 1-2 CLK Fall To Output EnabletEN 125200nsnsVDD = 5V, see Figure 1-2 VDD = , see Figure 1-2CS Rise To Output DisabletDIS 100nsSee Test Circuits, Figure 1-2 Note 1CS Disable TimetCSH310 nsDOUT Rise TimetR 100nsSee Test Circuits, Figure 1-2 Note 1 DOUT Fall TimetF 100nsSee Test Circuits, Figure 1-2 Note 1 Power Requirements.

5 Operating CurrentIDD 525300650 AVDD = , DOUT unloadedVDD = , DOUT unloadedStandby CurrentIDDS 2 ACS = VDD = ELECTRICAL CHARACTERISTICS (CONTINUED)All parameters apply at VDD = 5V, TA = -40 C to +85 C, fSAMPLE = 200 ksps and fCLK = 16*fSAMPLE, unless otherwise values apply for VDD = 5V, TA = +25 C, unless otherwise noted. PARAMETERSYMMINTYPMAXUNITSCONDITIONSNote 1:This parameter is established by characterization and not 100% :The sample cap will eventually lose charge, especially at elevated temperatures, therefore fCLK 10 kHz for temperatures at or above 70 4 2000-2011 Microchip Technology CHARACTERISTICS FIGURE 1-1:Serial Specifications: Unless otherwise indicated, VDD= + to + , VSS= RangesSpecified Temperature RangeTA-40 +85 COperating Temperature RangeTA-40 +85 CStorage Temperature RangeTA-65 +150 CThermal Package ResistancesThermal Resistance, 8L-MSOP JA 211 C/WThermal Resistance, 8L-PDIP JA C/WThermal Resistance, 8L-SOIC JA C/WThermal Resistance, 8L-TSSOP JA 139 C/WCSCLKDINMSB INtSUtHDtSUCStCSHtHItLODOUTtENtDOtRtFLSB MSB OUTtDISNULL BIT 2000-2011 Microchip Technology 5 MCP3002 FIGURE 1-2:Te s t C i r c u i ts.

6 VIHtDISCSDOUTW aveform 1*DOUTW aveform 2 90%10%* Waveform 1 is for an output with internalconditions such that the output is high, unless dis-abled by the output control. Waveform 2 is for an output with internalconditions such that the output is low, unless dis-abled by the output Waveforms for tDISTe s t P o i n Circuit for tR, tF, tDO3k CL = 30 pFTe s t P o i n tDOUTLoad Circuit for tDIS and tEN3k 30 pFtDIS Waveform 2tDIS Waveform 1 CSCLKDOUTtEN12B9 Voltage Waveforms for tEN tEN WaveformVDDVDD/2 VSS34 DOUTtRVoltage Waveforms for tR, tFCLKDOUTtDOVoltage Waveforms for tDOtFVOHVOLMCP3002DS21294E-page 6 2000-2011 Microchip Technology PERFORMANCE CHARACTERISTICSNote: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25 2-1:Integral Nonlinearity (INL) vs. Sample 2-2:Integral Nonlinearity (INL) vs. 2-3:Integral Nonlinearity (INL) vs.

7 2-4:Integral Nonlinearity (INL) vs. Sample Rate (VDD = ).FIGURE 2-5:Integral Nonlinearity (INL) vs. Code (VDD = ).FIGURE 2-6:Integral Nonlinearity (INL) vs. Temperature (VDD = ).Note:The graphs provided following this note are a statistical summary based on a limited number of samplesand are provided for informational purposes only. The performance characteristics listed herein are nottested or guaranteed. In some graphs, the data presented may be outside the specified operating range( , outside specified power supply range) and therefore outside the warranted 100 125 150 175 200 225 250 Sample Rate (ksps)INL (LSB)Positive INLN egative 1024 Digital CodeINL (LSB)VDD = 5 VfSAMPLE = 200 ( C)INL (LSB)Positive INLN egative Rate (ksps)INL (LSB)Positive INLN egative INLVDD = 1024 Digital CodeINL (LSB)VDD = MP L E = 75 ( C)INL (LSB)Positive INLVDD = = 75 kspsNegative INL 2000-2011 Microchip Technology 7 MCP3002 Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25 2-7:Integral Nonlinearity (INL) vs.

8 2-8:Differential Nonlinearity (DNL) vs. Sample 2-9:Differential Nonlinearity (DNL) vs. Code (Representative Part).FIGURE 2-10:Differential Nonlinearity (DNL) vs. 2-11:Differential Nonlinearity (DNL) vs. Sample Rate (VDD = ).FIGURE 2-12:Differential Nonlinearity (DNL) vs. Code (Representative Part, VDD= ). (V)INL(LSB)Positive INLN egative INLAll points taken at fSAMPLE= 200 ksps except VDD = , fSAMPLE = 75 125 150 175 200 225 250 Sample Rate (ksps)DNL (LSB)Positive DNLN egative 1024 Digital CodeDNL (LSB)VDD = 5 VfSAMPLE = 200 (V)DNL (LSB)Positive DNLN egative DNLAll points taken at fSAMPLE = 200 ksps except VDD = , fSAMPLE = 75 Rate (ksps)DNL (LSB)Positive DNLN egative DNLVDD = 1024 Digital CodeDNL (LSB)VDD = = 75 kspsMCP3002DS21294E-page 8 2000-2011 Microchip Technology : Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25 2-13:Differential Nonlinearity (DNL) vs.

9 2-14:Gain Error vs. 2-15:Gain Error vs. 2-16:Differential Nonlinearity (DNL) vs. Temperature (VDD = ).FIGURE 2-17:Offset Error vs. 2-18:Offset Error vs. ( C)DNL (LSB)Positive DNLN egative (V)Gain Error (LSB)All points taken at fSAMPLE = 200 ksps except VDD = , fSAMPLE = 75 ( C)Gain Error (LSB)VDD = 5 VfSAMPLE = 200 kspsVDD = = 75 ( C)DNL (LSB)Positive DNLVDD = = 75 kspsNegative (V)Offset Error (LSB)All points taken at fSAMPLE= 200 ksps except VDD = , fSAMPLE = 75 ( C)Offset Error (LSB)VDD = 5 VfSAMPLE = 200 kspsVDD = = 75 ksps 2000-2011 Microchip Technology 9 MCP3002 Note: Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25 2-19: Signal-to-Noise Ratio (SNR) vs. Input 2-20: Total Harmonic Distortion (THD) vs. Input 2-21:Effective Number of Bits (ENOB) vs. 2-22: Signal-to-Noise and Distortion (SINAD) vs. Input 2-23: Signal-to-Noise and Distortion (SINAD) vs.

10 Signal 2-24:Effective Number of Bits (ENOB) vs. Input Frequency (kHz)SNR (dB)VDD = = 75 kspsVDD = 5 VfSAMPLE = 200 ksps-100-90-80-70-60-50-40-30-20-1001101 00 Input Frequency (kHz)THD (dB)VDD = 5 VfSAMPLE = 200 kspsVDD = = 75 (V)ENOBAll points at fSAMPLE = 200 kspsexcept VDD = , fSAMPLE = 75 ksps01020304050607080110100 Input Frequency (kHz)SINAD (dB)VDD = = 75 kspsVDD = 5 VfSAMPLE = 200 ksps01020304050607080-40-35-30-25-20-15- 10-50 Input Signal Level (dB) SINAD (dB)VDD = = 75 kspsVDD = 5 VfSAMPLE = 200 Frequency (kHz)ENOB (rms)VDD = = 75 kspsVDD = 5 VfSAMPLE = 200 kspsMCP3002DS21294E-page 10 2000-2011 Microchip Technology : Unless otherwise indicated, VDD = 5V, fSAMPLE = 200 ksps, fCLK = 16* fSAMPLE, TA = +25 2-25:Spurious Free Dynamic Range (SFDR) vs. Input 2-26:Frequency Spectrum of 10 kHz input (Representative Part).FIGURE 2-27:Frequency Spectrum of 1 kHz input (Representative Part, VDD = ).