Transcription of MSP430FR573x Mixed-Signal Microcontrollers - …
1 ProductFolderOrderNowTechnicalDocumentsT ools &SoftwareSupport &CommunityAn IMPORTANTNOTICEat the end of this datasheetaddressesavailability,warranty, changes,use in safety-criticalapplications,intellectual propertymattersand ,MSP430FR5738,MSP430FR5737,MSP430FR5736, MSP430FR5735 MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, MSP430FR5730 SLAS639L JULY2011 REVISEDDECEMBER2017 MSP430FR573xMixed-SignalMicrocontrollers 1 EmbeddedMicrocontroller 16-BitRISCA rchitectureup to 24-MHzClock WideSupplyVoltageRange(2 V to V) 40 C to 85 C Operation OptimizedUltra-Low-PowerModes A/MHz(Typical) Standby(LPM3 WithVLO) A (Typical) Real-TimeClock(RTC)( ) A (Typical) Shutdown( ) A (Typical) Ultra-Low-PowerFerroelectricRAM(FRAM) Up to 16 KBof NonvolatileMemory Ultra-Low-PowerWrites FastWriteat 125 ns per Word(16 KBin 1 ms) Built-InErrorCorrectionCoding(ECC)andMem oryProtectionUnit (MPU) UniversalMemory= Program+ Data+ Storage 1015 WriteCycleEndurance RadiationResistantand Nonmagnetic IntelligentDigitalPeripherals 32-BitHardwareMultiplier(MPY)
2 Three-ChannelInternalDMA Real-TimeClock(RTC)WithCalendarandAlarmF unctions Five 16-BitTimersWithup to ThreeCapture/CompareRegisters 16-BitCyclicRedundancyChecker(CRC) High-PerformanceAnalog 16-ChannelAnalogComparatorWithVoltageRef erenceand ProgrammableHysteresis 12-Channel10-BitAnalog-to-DigitalConvert er(ADC)WithInternalReferenceand Sample-and-Hold 200 kspsat 100- A Consumption EnhancedSerialCommunication eUSCI_A0and eUSCI_A1 Support: UARTWithAutomaticBaud-RateDetection IrDAEncodeand Decode SPI eUSCI_B0 Supports: I2C WithMultiple-SlaveAddressing SPI HardwareUARTB ootloader(BSL) PowerManagementSystem FullyIntegratedLDO SupplyVoltageSupervisorfor Coreand SupplyVoltagesWithResetCapability Always-OnZero-PowerBrownoutDetection SerialOnboardProgrammingWithNo ExternalVoltageNeeded FlexibleClockSystem Fixed-FrequencyDCOWithSix SelectableFactory-TrimmedFrequencies(Dev iceDependent) Low-PowerLow-FrequencyInternalClockSourc e(VLO) 32-kHzCrystals(LFXT) High-FrequencyCrystals(HFXT)
3 DevelopmentToolsand Software FreeProfessionalDevelopmentEnvironment(C odeComposerStudio IDE) Low-CostFull-FeaturedKit(MSP-EXP430FR573 9) Full DevelopmentKit (MSP-FET430U40A) TargetBoard(MSP-TS430 RHA40A) FamilyMembers See FamilyMembersfor AvailableDeviceVariantsand Packages For CompleteModuleDescriptions,See theMSP430FR57xxFamilyUser's HomeAutomation Security SensorManagement DataAcquisitionCAUTIONT heseproductsuse sensitiveto extremetemperatures,suchas thoseexperiencedduringreflowor AbsoluteMaximumRatingsfor appliedin compliancewith the device-levelESDspecificationto preventelectricaloverstressor disturbof dataor System-LevelESDC onsiderationsfor (FR5739)(FR5735)4KB(FR5731)1 KBRAMMCLKACLKSMCLKCPUXV2andWorkingRegist ersEEM(S.)
4 3+1) ChannelPowerManagementSVSSYSW atchdogMPY32TA0TA1(2) Timer_A3 CCRegistersTB0TB1TB2(3) Timer_B3 CCRegistersADC10_B200 ksps14 channels(12 ext/2 int)10 bitDVCCDVSSAVCCAVSSRST/NMI/SBWTDIORTC_BC omp_D16 :UART,IrDA, SPIC opyright 2016, Texas Instruments IncorporatedJTAG,SBWI nterfaceI/O PortsP1/P22 8 I/OsInterrupt,Wake upPA1 16 I/OsI/O PortsP3/P41 8 I/OsInterrupt,Wake upPB1 10 I/Os1 2 I/OseUSCI_A0:UART,IrDA, SPIeUSCI_B0:SPI, I C22 MSP430FR5739,MSP430FR5738,MSP430FR5737,M SP430FR5736,MSP430FR5735 MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, MSP430FR5730 SLAS639L JULY2011.
5 MSP430FR5739 MSP430FR5738 MSP430FR5737 MSP430FR5736 MSP430FR5735 MSP430FR5734 MSP430FR5733 MSP430FR5732 MSP430FR5731 MSP430FR5730 DeviceOverviewCopyright 2011 2017,TexasInstrumentsIncorporated(1)For the mostcurrentpart,package,and orderinginformation,see thePackageOptionAddendumin Section8, or see the TI (2)The dimensionsshownhereare the packagedimensionswith tolerances,see theMechanicalDatain TI MSP430FR573xfamilyof ultra-low-powermicrocontrollersconsistso f multipledevicesthat featureembeddedFRAM nonvolatilememory,ultra-low-power16-bitM SP430 CPU,and differentperipheralstargetedfor architecture,FRAM,and peripherals,combinedwithsevenlow-powermo des,are optimizedto achieveextendedbatterylife in portableand a new nonvolatilememorythat combinesthe speed,flexibility,and enduranceof SRAM with thestabilityand reliabilityof flash,all at 10-bitADC.
6 A16-channelcomparatorwithvoltagereferenc egenerationand hysteresiscapabilities,threeenhancedseri alchannelscapableof I2C, SPI,or UART protocols,an internalDMA,a hardwaremultiplier,an RTC,five 16-bittimers,and (1)PARTNUMBERPACKAGEBODYSIZE(2)MSP430FR5 739 RHAVQFN(40)6 mm 6 mmMSP430FR5739 DATSSOP(38) mmMSP430FR5738 RGEVQFN(24)4 mm 4 mmMSP430FR5738 PWTSSOP(28) mm mmMSP430FR5738 YQDDSBGA(24)2 mm 2 functionalblockdiagramfor the MSP430FR5731,MSP430FR5735,andMSP430FR573 9devicesin the the functionalblockdiagramsfor all devicevariantsand packageoptions,see FunctionalBlockDiagram RHAP ackage MSP430FR5731,MSP430FR5735,MSP430FR57393 MSP430FR5739,MSP430FR5738,MSP430FR5737,M SP430FR5736,MSP430FR5735 MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, JULY2011 REVISEDDECEMBER2017 SubmitDocumentationFeedbackProductFolder Links.
7 MSP430FR5739 MSP430FR5738 MSP430FR5737 MSP430FR5736 MSP430FR5735 MSP430FR5734 MSP430FR5733 MSP430FR5732 MSP430FR5731 MSP430FR5730 Tableof ContentsCopyright 2011 2017,TexasInstrumentsIncorporatedTableof Contents1 TerminalConfigurationand Diagram RHAP ackage MSP430FR5731,MSP430FR5733,MSP430FR5735,M SP430FR5737, Diagram DA Package MSP430FR5731,MSP430FR5733,MSP430FR5735,M SP430FR5737, Diagram RGEP ackage MSP430FR5730,MSP430FR5732,MSP430FR5734,M SP430FR5736, Diagram YQDP ackage Diagram PW Package MSP430FR5730,MSP430FR5732,MSP430FR5734,M SP430FR5736, (IntoVCC) General-PurposeI/O( , , , , ,RST/NMI).
8 PortsP1 and P2( , ).. General-PurposeI/O( , , , , ,RST/NMI).. General-PurposeI/O( , , , , ).. General-PurposeI/O( , , , , ).. ,XT1,Low-Frequency(LF) ,XT1,High-Frequency(HF) (VLO).. , ,SVS, (UARTMode) (UARTMode).. (SPIM asterMode) (SPIM asterMode).. (SPIS laveMode).. (I2C Mode).. ,PowerSupplyand , , , , ,TemperatureSensorand (BSL).. (MPU).. (TLV)..897 Deviceand Mechanical,Packaging,and ,MSP430FR5738,MSP430FR5737,MSP430FR5736, MSP430FR5735 MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, MSP430FR5730 SLAS639L JULY2011 :MSP430FR5739 MSP430FR5738 MSP430FR5737 MSP430FR5736 MSP430FR5735 MSP430FR5734 MSP430FR5733 MSP430FR5732 MSP430FR5731 MSP430FR5730 RevisionHistoryCopyright 2011 2017,TexasInstrumentsIncorporated2 RevisionHistoryNOTE.
9 Pagenumbersfor previousrevisionsmay differfrompagenumbersin the , 2016to December5, 2017 Page Addedthe notethat begins"In LPM3,the " ,InternalVery-Low-PowerLow-FrequencyOsci llator(VLO)..25 Copyright 2011 2017,TexasInstrumentsIncorporatedDeviceC omparisonSubmitDocumentationFeedbackProd uctFolderLinks:MSP430FR5739 MSP430FR5738 MSP430FR5737 MSP430FR5736 MSP430FR5735 MSP430FR5734 MSP430FR5733 MSP430FR5732 MSP430FR5731 MSP430FR57305 MSP430FR5739,MSP430FR5738,MSP430FR5737,M SP430FR5736,MSP430FR5735 MSP430FR5734, MSP430FR5733, MSP430FR5732, MSP430FR5731, JULY2011 REVISEDDECEMBER20173 DeviceComparisonTable3-1 summarizesthe availablefamilymembers.
10 (1)For the mostcurrentpackageand orderinginformation,see the PackageOptionAddendumin Section8, or see the TI websiteat (2)Packagedrawings,standardpackingquanti ties,thermaldata,symbolization,and PCBdesignguidelinesare availableat (3)Eachnumberin the sequencerepresentsan instantiationof Timer_Awith its associatednumberof capture/compareregistersand example,anumbersequenceof 3, 5 wouldrepresenttwo instantiationsof Timer_A,the first instantiationhaving3 and the secondinstantiationhaving5 capture/compareregistersand PWMoutputgenerators,respectively.(4)Each numberin the sequencerepresentsan instantiationof Timer_Bwith its associatednumberof capture/compareregistersand example,anumbersequenceof 3, 5 wouldrepresenttwo instantiationsof Timer_B,the first instantiationhaving3 and the secondinstantiationhaving5 capture/compareregistersand PWMoutputgenerators, FamilyMembers(1)(2)DEVICEFRAM(KB)SRAM(KB )SYSTEMCLOCK(MHz)ADC10_BComp_DTimer_A(3) Timer_B(4)eUSCII/OPACKAGEC hannelA:UART,IrDA,SPIC hannelB.
