PIC18F2525/2620/4525/4620 Data Sheet

1 2008 Microchip Technology Sheet28/40/44-PinEnhanced Flash Microcontrollerswith 10-Bit A/D and nanoWatt TechnologyDS39626E-page ii 2008 Microchip Technology contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use.

2 No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the and other , Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the Age, Application Maestro, CodeGuard, dsPICDEM, , dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, , PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the and other is a service mark of Microchip Technology Incorporated in the other trademarks mentioned herein are property of their respective companies.

3 2008, Microchip Technology Incorporated, Printed in the , All Rights Reserved. Printed on recycled the following details of the code protection feature on Microchip devices: Microchip products meet the specification contained in their particular Microchip Data Sheet . Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code.

4 Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as unbreakable. Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of ourproducts. Attempts to break Microchip s code protection feature may be a violation of the Digital Millennium Copyright Act. If such actsallow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company s quality system processes and procedures are for its PIC MCUs and dsPIC DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products.

5 In addition, Microchip s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 2008 Microchip Technology 1 PIC18F2525/2620/4525/4620 Power Management Features: Run: CPU on, Peripherals on Idle: CPU off, Peripherals on Sleep: CPU off, Peripherals off Ultra Low 50nA Input Leakage Run mode Currents Down to 11 A Typical Idle mode Currents Down to A Typical Sleep mode Current Down to 100 nA Typical Timer1 Oscillator: 900 nA, 32 kHz, 2V Watchdog Timer: A, 2V Typical Two-Speed Oscillator Start-upFlexible Oscillator Structure: Four Crystal modes, up to 40 MHz 4x Phase Lock Loop (PLL) Available for Crystal and Internal Oscillators Two External RC modes, up to 4 MHz Two External Clock modes, up to 40 MHz Internal Oscillator Block:- Fast wake from Sleep and Idle, 1 s typical- 8 use-selectable frequencies, from 31 kHz to 8 MHz- Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL- User-tunable to compensate for frequency drift Secondary Oscillator using Timer1 @ 32 kHz Fail-Safe Clock Monitor:- Allows for safe shutdown if peripheral clock stopsPeripheral Highlights: High-Current Sink/Source 25 mA/25 mA Three Programmable External Interrupts Four Input Change Interrupts Up to 2 Capture/Compare/PWM (CCP) modules, one with Auto-Shutdown (28-pin devices) Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only):- One, two or four PWM outputs- Selectable polarity- Programmable dead time- Auto-shutdown and auto-restartPeripheral Highlights (Continued).

6 Master Synchronous Serial Port (MSSP) module Supporting 3-Wire SPI (all 4 modes) and I2C Master and Slave modes Enhanced Addressable USART module:- Supports RS-485, RS-232 and LIN/J2602- RS-232 operation using internal oscillator block (no external crystal required)- Auto-wake-up on Start bit- Auto-Baud Detect 10-Bit, up to 13-Channel Analog-to-Digital (A/D)Converter module:- Auto-acquisition capability- Conversion available during Sleep Dual Analog Comparators with Input Multiplexing Programmable 16-Level High/Low-Voltage Detection (HLVD) module:- Supports interrupt on High/Low-Voltage DetectionSpecial Microcontroller Features: C Compiler Optimized Architecture: - Optional extended instruction set designed to optimize re-entrant code 100,000 Erase/Write Cycle Enhanced Flash Program Memory Typical 1,000,000 Erase/Write Cycle Data EEPROM Memory Typical Flash/Data EEPROM Retention: 100 Years Typical Self-Programmable under Software Control Priority Levels for Interrupts 8 x 8 Single-Cycle Hardware Multiplier Extended Watchdog Timer (WDT):- Programmable period from 4 ms to 131s Single-Supply 5V In-Circuit Serial Programming (ICSP ) via Two Pins In-Circuit Debug (ICD) via Two Pins Wide Operating Voltage Range.

7 To Programmable Brown-out Reset (BOR) with Software Enable Option-DeviceProgram MemoryData MemoryI/O10-BitA/D (ch)CCP/ECCP(PWM) (bytes)# Single-WordInstructions SRAM(bytes)EEPROM(bytes)SPIM asterI2C PIC18F252548K245763968102425102/0YY121/3 PIC18F262064K327683968102425102/0YY121/3 PIC18F452548K245763968102436131/1YY121/3 PIC18F462064K327683968102436131/1YY121/3 28/40/44-Pin Enhanced Flash Microcontrollers with10-Bit A/D and nanoWatt TechnologyPIC18F2525/2620/4525/4620DS396 26E-page 2 2008 Microchip Technology Diagrams RB7/KBI3/PGDRB6/KBI2/PGCRB5/KBI1/PGMRB4/ KBI0/AN11RB3/AN9/CCP2(1)RB2/INT2/AN8RB1/ INT1/AN10RB0/INT0/FLT0/AN12 VDDVSSRD7/PSP7/P1 DRD6/PSP6/P1 CRD5/PSP5/P1 BRD4/PSP4RC7/RX/DTRC6/TX/CKRC5/SDORC4/SD I/SDARD3/PSP3RD2/PSP2 MCLR/VPP/RE3RA0/AN0RA1/AN1RA2/AN2/VREF-/ CVREFRA3/AN3/VREF+RA4/T0 CKI/C1 OUTRA5/AN4/SS/HLVDIN/C2 OUTRE0/RD/AN5RE1/WR/AN6RE2/CS/AN7 VDDVSSOSC1/CLKI/RA7 OSC2/CLKO/RA6RC0/T1 OSO/T13 CKIRC1/T1 OSI/CCP2(1)RC2/CCP1/P1 ARC3/SCK/SCLRD0/PSP0RD1/PSP1123456789101 1121314151617181920403938373635343332313 0292827262524232221 PIC18F4620 PIC18F2620101123456187912131415161718192 02324252627282221 MCLR/VPP/RE3RA0/AN0RA1/AN1RA2/AN2/VREF-/ CVREFRA3/AN3/VREF+RA4/T0 CKI/C1 OUTRA5/AN4/SS/HLVDIN/C2 OUTVSSOSC1/CLKI/RA7 OSC2/CLKO/RA6RC0/T1 OSO/T13 CKIRC1/T1 OSI/CCP2(1)RC2/CCP1RC3/SCK/SCLRB7/KBI3/P GDRB6/KBI2/PGCRB5/KBI1/PGMRB4/KBI0/AN11R B3/AN9/CCP2(1)

8 RB2/INT2/AN8RB1/INT1/AN10RB0/INT0/FLT0/A N12 VDDVSSRC7/RX/DTRC6/TX/CKRC5/SDORC4/SDI/S DA40-Pin PDIP28-Pin SPDIP, SOIC PIC18F4525 PIC18F2525 Note 1:RB3 is the alternate pin for CCP2 multiplexing. 2008 Microchip Technology 3 PIC18F2525/2620/4525/4620 Pin Diagrams (Cont. d) 1011234561181920212212131415388744434241 4039161729303132332324252627283634359 PIC18F452537RA3/AN3/VREF+RA2/AN2/VREF-/C VREFRA1/AN1RA0/AN0 MCLR/VPP/RE3RB3/AN9/CCP2(1)RB7/KBI3/PGDR B6/KBI2/PGCRB5/KBI1/PGMRB4/KBI0/AN11 NCRC6/TX/CKRC5/SDORC4/SDI/SDARD3/PSP3RD2 /PSP2RD1/PSP1RD0/PSP0RC3/SCK/SCLRC2/CCP1 /P1 ARC1/T1 OSI/CCP2(1)RC0/T1 OSO/T13 CKIOSC2/CLKO/RA6 OSC1/CLKI/RA7 VSSVSSVDDVDDRE2/CS/AN7RE1/WR/AN6RE0/RD/A N5RA5/AN4/SS/HLVDIN/C2 OUTRA4/T0 CKI/C1 OUTRC7/RX/DTRD4/PSP4RD5/PSP5/P1 BRD6/PSP6/P1 CRD7/PSP7/P1 DVSSVDDVDDRB0/INT0/FLT0/AN12RB1/INT1/AN1 0RB2/INT2/AN844-Pin QFN(2)

9 PIC18F4620101123456118192021221213141538 8744434241403916172930313233232425262728 3634359 PIC18F452537RA3/AN3/VREF+RA2/AN2/VREF-/C VREFRA1/AN1RA0/AN0 MCLR/VPP/RE3 NCRB7/KBI3/PGDRB6/KBI2/PGCRB5/KBI1/PGMRB 4/KBI0/AN11 NCRC6/TX/CKRC5/SDORC4/SDI/SDARD3/PSP3RD2 /PSP2RD1/PSP1RD0/PSP0RC3/SCK/SCLRC2/CCP1 /P1 ARC1/T1 OSI/CCP2(1)NCNCRC0/T1 OSO/T13 CKIOSC2/CLKO/RA6 OSC1/CLKI/RA7 VSSVDDRE2/CS/AN7RE1/WR/AN6RE0/RD/AN5RA5/ AN4/SS/HLVDIN/C2 OUTRA4/T0 CKI/C1 OUTRC7/RX/DTRD4/PSP4RD5/PSP5/P1 BRD6/PSP6/P1 CRD7/PSP7/P1 DVSSVDDRB0/INT0/FLT0/AN12RB1/INT1/AN10RB 2/INT2/AN8RB3/AN9/CCP2(1)44-Pin TQFPPIC18F4620 Note 1:RB3 is the alternate pin for CCP2 :For the QFN package, it is recommended that the bottom pad be connected to 4 2008 Microchip Technology of Overview .. Configurations .. Modes .. Organization .. EEPROM Memory .. Program Memory.

10 X 8 Hardware Ports .. Interrupts .. Timer0 Module .. Timer1 Module .. Timer2 Module .. Timer3 Module .. Capture/Compare/PWM (CCP) Modules .. Enhanced Capture/Compare/PWM (ECCP) Master Synchronous Serial Port (MSSP) Module .. Enhanced Universal Synchronous Receiver Transmitter (EUSART) .. 10-Bit Analog-to-Digital Converter (A/D) Module .. Comparator Comparator Voltage Reference Module .. High/Low-Voltage Detect (HLVD).. Special Features of the CPU .. Instruction Set Summary .. Development Electrical Characteristics .. DC and AC Characteristics Graphs and Tables .. Packaging 383 Appendix A: Revision 393 Appendix B: Device 394 Appendix C: Conversion Considerations .. 395 Appendix D: Migration from Baseline to Enhanced Devices.