STP4953 - Stanson Tech

1 STP4953 . Dual P Channel enhancement Mode MOSFET. DESCRIPTION. STP4953 is the dual P-Channel logic enhancement mode power field effect transistor which is produced using high cell density, DMOS trench technology. This high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage application such as LCD backlight, notebook computer power management, and other battery powered circuits. PIN CONFIGURATION FEATURE. SOP-8. -30 , RDS(ON) = 60m . @VGS =-10V. -30 , RDS(ON) = 80m . @VGS = -30 , RDS(ON) = 90m . @VGS = Super high density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability SOP-8 package design PART MARKING. SOP-8. ORDERING INFORMATION. Part Number Package Part Marking STP4953S8RG SOP-8 STP4953 . STP4953S8TG SOP-8 STP4953 . Process Code : A ~ Z ; a ~ z STP4953S8RG S8 : SOP-8 ; R : Tape Reel ; G : Pb Free STP4953S8TG S8 : SOP-8 ; T : Tube ; G : Pb Free Stanson TECHNOLOGY.

2 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. ABSOULTE MAXIMUM RATINGS (Ta = 25 Unless otherwise noted ). Parameter Symbol Typical Unit Drain-Source Voltage VDSS -30 V. Gate-Source Voltage VGSS 20 V. Continuous Drain Current TA=25 ID A. (TJ=150 ) TA=70 Pulsed Drain Current IDM -30 A. Continuous Source Current IS A. (Diode Conduction). TA=25 Power Dissipation PD W. TA=70 Operation Junction Temperature TJ -55/150 . Storgae Temperature Range TSTG -55/150 . Thermal Resistance-Junction to Ambient R JA 70 /W. Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. ELECTRICAL CHARACTERISTICS ( Ta = 25 Unless otherwise noted ). Parameter Symbol Condition Min Typ Max Unit Static Drain-Source Breakdown V(BR)DSS VGS=0V,ID=-250uA -30 V. Voltage Gate Threshold Voltage VGS(th) VDS=VGS,ID=-250 uA V.

3 Gate Leakage Current IGSS VDS=0V,VGS= 20V 100 nA. Zero Gate Voltage Drain IDSS VDS=-30V,VGS=0V -1. Current TJ=55 VDS=-30V,VGS=0V -5 uA. On-State Drain Current ID(on) VDS=-5V,VGS=10V -25 0 A. VGS=-10V, ID= Drain-source On-Resistance RDS(on) VGS= , ID= . VGS= ,ID= Forward Tran Conductance gfs VDS=-10V,ID= S. Diode Forward Voltage VSD IS= ,VGS=0V V. Dynamic Total Gate Charge Qg 15 10. VDS=-15V,VGS=-10V. Gate-Source Charge Qgs ID nC. Gate-Drain Charge Qgd Input Capacitance Ciss 680. Output Capacitance VDS =-15V,VGS=0V. Coss 120 pF. f=1 MHz Reverse TransferCapacitance Crss 75. td(on) 15. Turn-On Time tr VDD=15V,RL=15 . 10 20. ID= ,VGEN=-10V nS. td(off) RG=6 40 80. Turn-Off Time tf 20 40. Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. TYPICAL CHARACTERICTICS (25 Unless Note). Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp.

4 STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. TYPICAL CHARACTERICTICS (25 Unless Note). Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. TYPICAL CHARACTERICTICS (25 Unless Note). Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. SOP-8 PACKAGE OUTLINE. Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1. STP4953 . Dual P Channel enhancement Mode MOSFET. Stanson TECHNOLOGY. 120 Bentley Square, Mountain View, Ca 94040 USA. Copyright 2007, Stanson Corp. STP4953 2007. V1.