TMS320x2802x, 2803x Piccolo Serial …

1 TMS320x2802x, 2803xPiccoloSerialCommunica tionsInterface(SCI)ReferenceGuideLiterat ureNumber:SPRUGH1 CDecember2008 RevisedOctober20092 SPRUGH1C December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009, (SCICCR).. (SCICTL1).. (SCIHBAUD,SCILBAUD).. (SCICTL2).. (SCIRXST).. (SCIRXEMU,SCIRXBUF).. (SCITXBUF).. (SCIFFTX,SCIFFRX,SCIFFCT).. (SCIPRI).. December2008 RevisedOctober2009 TableofContentsSubmitDocumentationFeedba ckCopyright 2008 2009, (SCI) (SCICCR) (SCICTL1) (SCIHBAUD) (SCILBAUD) (SCICTL2) (SCIRXST) (SCIRXEMU) (SCIRXBUF) (SCITXBUF) (SCIFFTX)Register (SCIFFRX)Register (SCIFFCT)Register (SCIPRI) December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009, (SCICCR) (SCICTL1) (SCICTL2) (SCIRXST) (SCIRXBUF) (SCIFFRX) (SCIFFCT) December2008 RevisedOctober2009 ListofTablesSubmitDocumentationFeedbackC opyright 2008 2009,TexasInstrumentsIncorporatedPreface SPRUGH1C December2008 RevisedOctober2009 ReadThisFirstAboutThisManualThismanualde scribesthefeaturesandoperationoftheseria lcommunicationinterface(SCI) thisreferenceguideis a Type0 ,28xxxPeripheralReferenceGuide(SPRU566)

2 Fora listofalldeviceswitha moduleofthesametype,todeterminethediffer encesbetweentypes,andfora listofdevice-specificdifferenceswithina ,thefollowingnumberis 40hexadecimal(decimal64):40h. Registersin thisdocumentareshownin figuresanddescribedin tables. Eachregisterfigureshowsa labeledwithitsbitname,itsbeginningandend ingbitnumbersabove, legendexplainsthenotationusedfortheprope rties. Reservedbitsin a registerfiguredesignatea bitthatis :Entertheliteraturenumberin TMS320F28020,TMS320F28021,TMS320F28022,T MS320F28023,TMS320F28026,TMS320F28027 PiccoloMicrocontrollersDataManualcontain sthepinout,signaldescriptions, TMS320F28020,TMS320F28021,TMS320F28022,T MS320F28023,TMS320F28026, TMS320F28030,TMS320F28031,TMS320F28032,T MS320F28033,TMS320F28034,TMS320F28035 PiccoloMicrocontrollersDataManualcontain sthepinout,signaldescriptions, TMS320F28030,TMS320F28031,TMS320F28032,T MS320F28033,TMS320F28034, 'sGuides SPRU430 TMS320C28xCPUandInstructionSetReferenceG uidedescribesthecentralprocessingunit(CP U)andtheassemblylanguageinstructionsofth eTMS320C28xfixed-pointdigitalsignalproce ssors(DSPs).

3 It SPRUFN3 TMS320x2802xPiccoloSystemControlandInter ruptsReferenceGuidedescribesthevariousin terruptsandsystemcontrolfeaturesofthe280 2xmicrocontrollers(MCUs).6 PrefaceSPRUGH1C December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009, TMS320x2803xPiccoloSystemControlandInter ruptsReferenceGuidedescribesthevariousin terruptsandsystemcontrolfeaturesofthe280 3xmicrocontrollers(MCUs).SPRU566 TMS320x28xx,28xxxDSPP eripheralReferenceGuidedescribestheperip heralreferenceguidesofthe28xdigitalsigna lprocessors(DSPs).SPRUGO0 TMS320x2803xPiccoloBootROMR eferenceGuidedescribesthepurposeandfeatu resofthebootloader(factory-programmedboo t-loadingsoftware) TMS320x2802xPiccoloBootROMR eferenceGuidedescribesthepurposeandfeatu resofthebootloader(factory-programmedboo t-loadingsoftware) TMS320x2803xPiccoloControlLawAccelerator (CLA)ReferenceGuidedescribestheoperation oftheControlLawAccelerator(CLA).SPRUGE2 TMS320x2803xPiccoloLocalInterconnectNetw ork(LIN)ModuleReferenceGuidedescribesthe operationoftheLocalInterconnectNetwork(L IN) TMS320x2803xPiccoloEnhancedQuadratureEnc oderPulse(eQEP)ReferenceGuidedescribesth eoperationoftheEnhancedQuadratureEncoder Pulse(eQEP)module,whichis usedforinterfacingwitha linearorrotaryincrementalencodertogetpos ition,direction,andspeedinformationfroma rotatingmachinein TMS320x2803xPiccoloEnhancedControllerAre aNetwork(eCAN)ReferenceGuidedescribesthe operationoftheEnhancedControllerAreaNetw ork(eCAN)whichusesestablishedprotocoltoc ommunicateseriallywithothercontrollersin TMS320x2802x, 2803xPiccoloAnalog-to-Digit alConverter(ADC)andComparatorReferenceGu idedescribeshowtoconfigureandusetheon-ch ipADCmodule,whichis a TMS320x2802x, 2803xPiccoloEnhancedPulseWi dthModulator(ePWM)

4 ModuleReferenceGuidedescribesthemainarea softheenhancedpulsewidthmodulatorthatinc ludedigitalmotorcontrol,switchmodepowers upplycontrol,UPS(uninterruptiblepowersup plies), TMS320x2802x, 2803xPiccoloHigh-Resolution PulseWidthModulator(HRPWM)describestheop erationofthehigh-resolutionextensiontoth epulsewidthmodulator(HRPWM).SPRUGH1 TMS320x2802x, 2803xPiccoloSerialCommunica tionsInterface(SCI) TMS320x2802x, 2803xPiccoloEnhancedCapture (eCAP) TMS320x2802x, 2803xPiccoloSerialPeriphera lInterface(SPI)ReferenceGuidedescribesth eSPI- a high-speedsynchronousserialinput/output( I/O)port- thatallowsa serialbitstreamofprogrammedlength(onetos ixteenbits) TMS320x2802x, 2803xPiccoloInter-Integrate dCircuit(I2C)ReferenceGuidedescribesthef eaturesandoperationoftheinter-integrated circuit(I2C) SPRU513 'sGuidedescribestheassemblylanguagetools (assemblerandothertoolsusedtodevelopasse mblylanguagecode),assemblerdirectives,ma cros,commonobjectfileformat, December2008 RevisedOctober2009 ReadThisFirstSubmitDocumentationFeedback Copyright 2008 2009, TMS320C28xOptimizingC/C++ 'sGuidedescribestheTMS320C28x C/C++ ++ TMS320C28xInstructionSetSimulatorTechnic alOverviewdescribesthesimulator,availabl ewithintheCodeComposerStudioforTMS320C20 00 IDE,thatsimulatestheinstructionsetoftheC 28x , December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009,TexasInstrumentsIncorporatedReferen ceGuideSPRUGH1C December2008 RevisedOctober2009 OverviewTheserialcommunicationsinterface (SCI)is a two wireasynchronousserialport, (NRZ)

5 4-leveldeepFIFO forreducingservicingoverhead, , ,theSCIchecksreceiveddataforbreakdetecti on,parity,overrun, programmabletodifferentspeedsthrougha December2008 RevisedOctober2009 OverviewSubmitDocumentationFeedbackCopyr ight 2008 2009,TexasInstrumentsIncorporatedCPUSYSC LKOUTLow speedprescalerSystemcontrolblockPIEblock RXINTTXINTR egistersSCISCIAENCLKLSPCLKSCIRXDSCITXDGP IOMUXData : Twoexternalpins: SCITXD:SCItransmit-outputpin SCIRXD:SCIreceive-inputpinBothpinscanbeu sedasGPIOif notusedforSCI. Baudrateprogrammableto64 Kdifferentrates Data-wordformat Onestartbit Data-wordlengthprogrammablefromonetoeigh tbits Optionaleven/odd/noparitybit Oneortwostopbits Fourerror-detectionflags:parity,overrun, framing,andbreakdetection Twowake-upmultiprocessormodes:idle-linea ndaddressbit Half-orfull-duplexoperation Double-bufferedreceiveandtransmitfunctio ns Transmitterandreceiveroperationscanbeacc omplishedthroughinterrupt-drivenorpolled algorithmswithstatusflags.

6 Separateenablebitsfortransmitterandrecei verinterrupts(exceptBRKDT) NRZ(non-return-to-zero)format 13 SCImodulecontrolregisterslocatedin accessed,theregisterdatais inthelowerbyte(7 0),andtheupperbyte(15 8)is : Auto-baud-detecthardwarelogic 4-leveltransmit/receiveFIFO10 OverviewSPRUGH1C December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009,TexasInstrumentsIncorporatedTX FIFO _0 LSPCLKWUTF rame Format and ModeEven/OddEnableParitySCI RX Interrupt select INT TX Interrupt select logicTX INT ERR INT 15 - 8 Baud RateMSbyteRegisterSCILBAUD. 7 - 0 Transmitter-DataBuffer FIFO _1-----TX FIFO _38TX FIFO registersTX FIFOTX FIFO DataBuffer FIFO_1RX FIFO _08RX FIFO InterruptLogicRXINTRX OERX - 2To CPUTo CPUAutoBaud Detect configuredandcontrolledbytheregisterslis tedin Table1 (SCI)ModuleBlockDiagram11 SPRUGH1C December2008 RevisedOctober2009 OverviewSubmitDocumentationFeedbackCopyr ight 2008 2009, (x16)DescriptionSCICCR0x0000-70501 SCI-ACommunicationsControlRegisterSCICTL 10x0000-70511 SCI-AControlRegister1 SCIHBAUD0x0000-70521 SCI-ABaudRegister,HighBitsSCILBAUD0x0000 -70531 SCI-ABaudRegister, (x16)Description(1)(2)

7 SCICCR0x0000-77501 SCI-BCommunicationsControlRegisterSCICTL 10x0000-77511 SCI-BControlRegister1 SCIHBAUD0x0000-77521 SCI-BBaudRegister,HighBitsSCILBAUD0x0000 -77531 SCI-BBaudRegister,LowBitsSCICTL20x0000-7 7541 SCI-BControlRegister2 SCIRXST0x0000-77551 SCI-BReceiveStatusRegisterSCIRXEMU0x0000 -77561 SCI-BReceiveEmulationDataBufferRegisterS CIRXBUF0x0000-77571 SCI-BReceiveDataBufferRegisterSCITXBUF0x 0000-77591 SCI-BTransmitDataBufferRegisterSCIFFTX0x 0000-775A1 SCI-BFIFOT ransmitRegisterSCIFFRX0x0000-775B1 SCI-BFIFOR eceiveRegisterSCIFFCT0x0000-775C1 SCI-BFIFOC ontrolRegisterSCIPRI0x0000-775F1 SCI-BPriorityControlRegister(1) (2)SCIBis full-duplexoperationareshownin Figure2 andinclude: A transmitter(TX)anditsmajorregisters(uppe rhalfofFigure2) SCITXBUF (loadedbytheCPU)tobetransmitted TXSHF register ,onebitata time A receiver(RX)anditsmajorregisters(lowerha lfofFigure2) RXSHF register fromSCIRXDpin,onebitata time SCIRXBUF loadedintoregisterRXSHF andthenintoregistersSCIRXBUFandSCIRXEMU A programmablebaudgenerator December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009,TexasInstrumentsIncorporatedStartLS B23 Parity Stop4567 MSBS tartLSB23 Addr/dataParity4567 MSBStopIdle-line mode(Normal nonmultiprocessor communications)Address-bit modeAddress ,theidle-linemultiprocessormode( ) andtheaddress-bitmultiprocessormode( ).

8 (UART) ( ) : Onestartbit Onetoeightdatabits Aneven/oddparitybitornoparitybit ,bothreceiveandtransmit,is in NRZ(non-return-to-zero) ,showninFigure3, consistsof: Onestartbit Onetoeightdatabits Aneven/oddparitybit(optional) Oneortwostopbits Anextrabittodistinguishaddressesfromdata (address-bitmodeonly)Thebasicunitofdatai s calleda characterandis onetoeightbitsin startbit,oneortwostopbits, characterofdatawithitsformattinginformat ionis calleda frameandis shownin , December2008 RevisedOctober2009 OverviewSubmitDocumentationFeedbackCopyr ight 2008 2009, (s) :0 Selectthecharacter(data)length(onetoeigh tbits). setto1,ordisablestheparityfunctionENABLE if parityis enabled,selectsoddparityif clearedto0 onestopbitif clearedto0 ortwostopbitsif ,thereshouldbeonlyonetransferata ,therecanbeonlyonetalkerona seriallineata blockofinformationthatthetalkersendscont ainsanaddressbytethatis (bit2 ofSCICTL1)to1 sothattheyareinterruptedonlywhentheaddre ssbyteis processorreadsa blockaddressthatcorrespondstotheCPUdevic eaddressassetbyyourapplicationsoftware, 1,it doesnotsetRXRDY,RXINT,oranyofthereceiver errorstatusbitsto1 unlesstheaddressbyteis detectedandtheaddressbitin thereceivedframeis a 1 (applicabletoaddress-bitmode).

9 TheSCIdoesnotaltertheSLEEPbit; processorrecognizesanaddressbytedifferen tly, : Theidle-linemode( ) leavesa Theaddress-bitmode( ) addsanextrabit(thatis,anaddressbit) ,unliketheidlemode,it ,ata hightransmitspeed,theprogramis notfastenoughtoavoida 10-bitidlein softwareselectableviatheADDR/IDLEMODEbit (SCICCR,bit3).BothmodesusetheTXWAKE flagbit(SCICTL1,bit3),RXWAKE flagbit(SCIRXST,bit1),andtheSLEEP flagbit(SCICTL1,bit2) , ,theSCIportwakesupandrequestsaninterrupt (bitnumber1RX/BKINTENA-ofSCICTL2mustbeen abledtorequestaninterrupt).It readsthefirstframeoftheblock, December2008 RevisedOctober2009 SubmitDocumentationFeedbackCopyright 2008 2009,TexasInstrumentsIncorporatedAddress DataLast DataFirst frame within blockIs address; it follows idleperiod of 10 bits or moreFrame withinblockIdle periodless than 10bitsIdle period of 10 bitsor more Several blocks of framesData format(Pins SCIRXD, SCITXD)Data format expandedIdle periods of 10 bits or moreseparate the blocksStartStartStart One block of softwareroutineis checkedagainstitsdeviceaddressbytestored in thecheckshowsthattheblockis addressedtothedeviceCPU,theCPUclearstheS LEEP bitandreadstherestoftheblock;if not, (ADDR/IDLEMODEbit=0),blocksareseparatedb yhavingalongeridletimebetweentheblocksth anbetweenframesin frameindicatesthestartofa singlebitis calculateddirectlyfromthebaudvalue(bitsp ersecond).

10 Theidle-linemultiprocessorcommunicationf ormatis showninFigure4 (ADDR/IDLEMODE bitis bit3 ofSCICCR). (sentbya remotetransmitter) theCPUis beingaddressed, theCPUis notbeingaddressed, block- :Deliberatelyleaveanidletimeoftenbitsorm orebydelayingthetimebetweenthetransmissi onofthelastframeofdatain :TheSCIportfirstsetstheTXWAKEbit(SCICTL1 ,bit3)to1 ,theserialcommunicationslineis notidleanylongerthannecessary.(Adon'tcar ebytehastobewrittentoSCITXBUF aftersettingTXWAKE,andbeforesendingthead dress,soastotransmittheidletime.)15 SPRUGH1C December2008 RevisedOctober2009 OverviewSubmitDocumentationFeedbackCopyr ight 2008 2009,TexasInstrumentsIncorporatedTXWAKEW UTT ransmit buffer (SCITXBUF) (WUT)FlagAssociatedwiththeTXWAKE bitis thewake-uptemporary(WUT) aninternalflag, loadedfromSCITXBUF,WUTis loadedfromTXWAKE,andtheTXWAKE bitis shownin wake-uptemporarySendinga BlockStartSignalTosendouta block-startsignalofexactlyoneframetimedu ringa 1 dataword(contentnotimportant:a don t care)totheSCITXBUF register(transmitdatabuffer)tosenda block-startsignal.