Zero Voltage Switching - Texas Instruments

1 zero Voltage SwitchingResonant Power ConversionBill Andreycaking zero current, hence zero power while true, two obvious concerns canin1pede the quest for high efficiency operationwith high Voltage nature of the resonant tank and zerocurrent Switching limitation, the peak switchcurrent is significantly higher than its squarewave counterpart. In fact, the peak of the fullload switch current is a minimum of twice thatof its square wave kin. In its off state, theswitch returns to a blocking a high voltageevery cycle. When activated by the next drivepulse, the MOSFET output capacitance ( Coss)is discharged by the FET, contributing a signifi-cant power loss at high frequencies and highvoltages. Instead, both of these losses areavoided by implementing a zero Voltage switch-ing technique [9,10].

2 zero Voltage Switching OverviewZero Voltage Switching can best be definedas conventional square wave power conversionduring the switch's on-time with "resonant" Switching transitions. For the most part, it canbe considered as square wave power utilizing aconstant off-time control which varies theconversion frequency, or on-time to maintainregulation of the output Voltage . For a givenunit of tin1e, this method is similar to fIXedfrequency conversion which uses an adjustableduty cycle, as shown in Fig. of the output Voltage is accomp-lished by adjusting the effective duty cycle,performed by varying the conversion frequency, changing the effective on-time in a ZVSdesign. The foundation of this conversion issin1ply the volt-second product equating of theinput and output.

3 It is virtually identical to thatof square wave power conversion, and vastly elAbstractThe technique of zero Voltage Switching inmodern power conversion is explored. SeveralZVS topologies and applications, limitations ofthe ZVS technique, and a generalized designprocedure are featured. Two design examplesare presented: a 50 Watt DC/DC converter,and an off-line 300 Watt multiple output powersupply. This topic concludes with a perfor-mance comparison of ZVS converters to theirsquare wave counterparts, and a summary oftypical in resonant and quasi-resonantpower conversion technology propose alterna-tive solutions to a conflicting set of squarewave conversion design goals; obtaining highefficiency operation at a high Switching fre-quency from a high Voltage source.

4 Currently,the conventional approaches are by far, still inthe production mainstream. However, anincreasing challenge can be witnessed by theemerging resonant technologies, primarily dueto their lossless Switching merits. The intent ofthis presentation is to umavel the details ofzero Voltage Switching via a comprehensiveanalysis of the timing intervals and relevantvoltage and current concept of quasi-resonant, "lossless" Switching is not new, most noticeably patentedby one individual [1] and publicized by anotherat various power conferences [2,3]. Numerousefforts focusing on zero current switchingensued, fIrst perceived as the likely candidatefor tomorrow's generation of high frequencypower converters [4,5,6,7,8]. In theory, the on-off transitions occur at a time in the resonantcycle where the switch current is zero , facilitat- zero Voltage Switching Resonant Conversion1-1vSQUAREWAVER Topp ~k.

5 XXBD -JFREQ0vzvs0 Fig. 1- zero Voltage Switching vs. Conventional Square WaveFig. 2 -Resonant Switch ImplementationSWITCH -~OPP I 0. I OPP r-;;;-0. OPP 0. OPP OBacTIvATIoBi iI II II II IIVIW-VO1- VCR IO -oFig. 3- Genera/ Wavefonnsunlike the energy transfer system of its electri-cal dual, the zero current switched converter .During the ZVS switch off-time, the L-Ctank circuit resonates. This traverses the volt -age across the switch from zero to its peak,and back down again to zero . At this point theswitch can be reactivated, and lossless zerovoltage Switching facilitated. Since the outputcapacitance of the MOSFET switch (Coss) hasbeen discharged by the resonant tank, it doesnot contribute to power loss or dissipation inthe switch. Therefore, the MOSFET transitionlosses go to zero -regardless of operatingfrequency and input Voltage .

6 This could repre-sent a significant savings in power, and result ina substantial improvement in efficiency. obvi-ously, this attribute makes zero Voltage switch-ing a suitable candidate for high frequency,high Voltage converter designs. Additionally, thegate drive requirements are somewhat reducedin a ZVS design due to the lack of the gate todrain (Miller) charge, which is deleted whenV DS equals technique of zero Voltage Switching isapplicable to all Switching topologies; the buckregulator and its derivatives (forward, half andfull bridge), the flyback, and boost converters,to name a few. This presentation will focus onthe continuous output current, buck derivedtopologies, however a list of references describ-ing the others has been included in the power " Lossless " Switching EMI / RFI at power loss due to discharging higher peak currents, (ie.)

7 ZCS) same assquare wave efficiency with high Voltage inputs atany incorporate parasitic circuit and compo-nentL&C1-2 UNITRODE gate drive requirements (no"Miller" effects).Short circuit tolerantfIlter section consisting of output inductor Loand capacitor Co has a time constant severalorders of magnitude larger than any powerconversion period. The fIlter inductance is largein comparison to that of the resonant inductor'svalue LR and the magnetizing current MLo aswell as the inductor's DC resistance is negligi-ble. In addition, both the input Voltage VlN andoutput Voltage Vo are purely DC, and do notvary during a given conversion cycle. Last, theconverter is operating in a closed loop configu-ration which regulates the output Voltage Vo.

8 Initial Conditions: Time interval < toBefore analyzing the individual time inter-vals, the initial conditions of the circuit must bedeflDed. The analysis will begin with switch Qlon, conducting a drain current ID equal to theoutput current Io, and VDs = VCR = O (ideal).In series with the switch Ql is the resonantinductor LR and the output inductor Lo whichalso conduct the output current Io .It has beenestablished that the output inductance Lo islarge in comparison to the resonant inductorLR and all components are ideal. Therefore, thevoltage across the output inductor V Lo equalsthe input to output Voltage differential; V Lo =VlN -Vo .The output filter section catch diodeDo is not conducting and sees a reverse voltageequal to the input Voltage ; V Do = Vl, observingthe polarity shown in Figure I.

9 INITIAL CONDITIONSCOMP. STATUS01 ONDo OFFLAL ozvs Differences:.Variable frequency operation (in general).Higher off-state voltages in single switch,unclamped new technology -users must climbthe learning frequency is inversely propor-tional to load more sophisticated control circuit may berequiredZVS Design EquationsA zero Voltage switched buck regulatorwill be used to develop the design equationsfor the various voltages, currents and timeintervals associated with each of the conversionperiods which occur during one completeswitching cycle. The circuit schematic, compo-nent references, and relevant polarities areshown in Fig. design procedure guidelines and"shortcuts" will be employed during the anal-ysis' for the purpose of brevity.

10 At the onset,all components will be treated as though theywere ideal which simplifies the generation ofthe basic equations and relationships. As thissection progresses, losses and non-ideal charac-teristics of the components will be added to theformulas. The timing summary will expoundupon the equations for a precise valid assumption is that the outputCIRCUIT VALUESVDS=VCR=O; ID=ILR=ILO=loVDO=VIN; IDO=OILR=IO ; VLR=OV, r)=VIN-VO ; ILO=OVoCapacitor Charging State: to -t 1 The conversion period is initiated at time towhen switch QI is turned OFF. Since thecurrent through resonant inductor LR andoutput inductor Lo cannot change instanta-neously, and no drain current flows in QI whileFig. 4 - zero Voltage Switched buck Regulator1-3 zero Voltage Switching Resonant ConversionTable II -CAPACITOR CHARGING: to -tlFig.