SPI Block Guide V4 - NXP

AN10441 Level shifting techniques in I2C-bus design

Document information AN10441 Level shifting techniques in I2C-bus design Rev. 01 — 18 June 2007 Application note Info Content Keywords I2C-bus, level shifting Abstract Logic level shifting may be required when interfacing legacy devices with

  Notes, Applications, Levels, Technique, Shifting, Application note, An10441 level shifting techniques in, An10441

AN3234: Washing Machine Three-Phase AC …

Washing Machine Three-Phase AC Induction Motor Drive, Rev. 0 Indirect Vector Control 4 Freescale Semiconductor If you are looking for more theory on the field ...

  Machine, Washing, Washing machine

1. General description - nxp.com

1. General description The TJA1044 is part of the Mantis family of high-speed CAN transceivers. It provides an interface between a Controller Area Network (CAN) protocol controller and the physical

  General, Descriptions, General description, General description nxp

PCA9570 Remote 4-bit general purpose outputs for 1 MHz …

1. General description The PCA9570 is a CMOS device that provides 4 bits of General Purpose parallel Output (GPO) expansion in low voltage processor and handheld battery powered mobile

  General, Purpose, Remote, Output, General purpose, Pca9570 remote 4 bit general purpose outputs for, Pca9570

P82B96 Dual bidirectional bus buffer - nxp.com

1. General description The P82B96 is a bipolar IC that creates a non-latching, bidirectional, logic interface between the normal I2C-bus and a range of other bus configurations.It can interface

S32K144 EVB Quick Start Guide - NXP Semiconductors

J14 SWD connector. 3 EXTERNAL USE S32K144 EVBFeatures: ... USB connector of the USB cable to micro-B port J7 on the S32K144EVB. ... Windows, Linux and Mac operating systems. Using the MSD Flash Programmer 1. Locate the .srec file of your project , file is under the

Three-Phase BLDC Motor Sensorless Control Using …

This document describes the design of a three-phase brushless DC motor (BLDC motor) drive based on Freescale’s MC56F8013 and MC56F8023 dedicated motor control device. Brushless DC motors are popular in a wide application area.

  Phases, Using, Control, Motor, Three, Sensorless, Brushless, Brushless dc, Three phase brushless dc, Motor sensorless control using

AN11443 BFU550XR ISM 433 MHz LNA design - nxp.com

AN11443 BFU550XR ISM 433 MHz LNA design Rev. 1 — 23 January 2014 Application note . Document information Info Content Keywords BFU520, BFU530, BFU550 series, ISM-band, 433MHz 866MHz Abstract This document describes an ISM Frequency LNA design on BFU5xxXR Starter kit

  433 mhz, 433mhz

DSP56156 16-Bit Digital Signal Processor - nxp.com

The DSP56156 is a general-purpose MPU-style Digital Signal Processor (DSP). On a single semi- conductor chip, the DSP56156 comprises a very efficient 16-bit digital signal processing core, pro-

  Processor, Processing, Signal, Digital, Digital signal processing, Digital signal processor

SAA7706H Car radio Digital Signal Processor (DSP)

Car radio Digital Signal Processor (DSP) SAA7706H This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in

  Processor, Radio, Signal, Digital, Car radio digital signal processor

ENC28J60 Data Sheet - Microchip Technology

Oct 26, 2012 · with an industry standard Serial Peripheral Interface (SPI). It is designed to serve as an Ethernet network interface for any controller equipped with SPI. The ENC28J60 meets all of the IEEE 802.3 specifica-tions. It incorporates a number of packet filtering schemes to limit incoming packets. It also provides an

  Serial, Interface, Peripheral, Serial peripheral interface

ATtiny202/204/402/404/406 - Microchip Technology

– One host/client Serial Peripheral Interface (SPI) – One Two-Wire Interface (TWI) with dual address match • Philips I2C compatible • Standard mode (Sm, 100 kHz) • Fast mode (Fm, 400 kHz) • Fast mode plus (Fm+, 1 MHz) – One Analog Comparator (AC) with a low propagation delay – One 10-bit 115 ksps Analog-to-Digital Converter (ADC)

  Serial, Interface, Peripheral, Serial peripheral interface, Attiny202 204 402 404 406, Attiny202

Low Noise, Low Drift, Low Power, 3-Axis MEMS ...

by their relevant function for either the serial peripheral interface (SPI) or limited I2C interface. 1 Protected by U.S. Patents 8,472,270; ... Changes to Serial Communications Section and Figure 64 ..... 26 Added SPI Bus Sharing Section and Figure 65; Renumbered ... Changes to Temperature Data Registers Section, Table 23, Table 24, and Table ...

  Serial, Section, Interface, Peripheral, Serial peripheral interface

ESP8266 Technical Reference - Espressif

2016.06 V1.1 Added Section 4.5 Interface Description. 2016.08 V1.2 Updated Section 14.1 Sniffer Introduction. 2017.05 V1.3 Updated Section 4.1.2 SPI Features. 2019.08 V1.4 Updated Section 1.1 General Purpose Input/Output Interface (GPIO). 2020.07 V1.5 • Updated Section 1.3 Serial Peripheral Interface (SPI/ HSPI); • Added documentation feedback links. ...

  Serial, Section, Reference, Technical, Interface, Peripheral, Serial peripheral interface, Technical reference

MFRC522 Standard performance MIFARE and NTAG frontend …

SPI up to 10 Mbit/s I2C-bus interface up to 400 kBd in Fast mode, up to 3400 kBd in High-speed mode RS232 Serial UART up to 1228.8 kBd, with voltage levels dependant on pin voltage supply FIFO buffer handles 64 byte send and receive Flexible interrupt modes Hard reset with low power function Power-down by software mode

  Serial, Interface

Si4463-61-60-C Rev-C High-Performance, Low-Current …

Si4463/61/60-C 6 Rev 1.0 Table 3. Receiver AC Electrical Characteristics1,2 Parameter Symbol Test Condition Min Typ Max Unit RX Frequency Range FRX 850 — 1050 MHz 350 — 525 MHz

Preliminary Product Specification v1 - SparkFun Electronics

You can operate and configure the nRF24L01+ through a Serial Peripheral Interface (SPI). The register map, which is accessible through the SPI, contains all configuration registers in the nRF24L01+ and is accessible in all operation modes of the chip. The embedded baseband protocol engine (Enhanced ShockBurst™) is based on packet communication

  Serial, Electronic, Interface, Peripheral, Serial peripheral interface, Nrf24l01, Sparkfun, Sparkfun electronics