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LTC1666/LTC1667/LTC1668 - 12-Bit, 14-Bit, 16-Bit, 50Msps …

LTC1666/LTC1667/LTC1668 . 12-Bit, 14-Bit, 16-Bit, 50 Msps DACs U. FEATURES DESCRIPTIO. 50 Msps Update Rate The LTC 1666/LTC1667/LTC1668 are 12-/14-/16-bit, Pin Compatible 12-Bit, 14-Bit and 16-Bit Devices 50 Msps differential current output DACs implemented on High Spectral Purity: 87dB SFDR at 1 MHz fOUT a high performance BiCMOS process with laser trimmed, 5pV-s Glitch Impulse thin-film resistors. The combination of a novel current- Differential Current Outputs steering architecture and a high performance process 20ns Settling Time produces DACs with exceptional AC and DC performance. Low Power: 180mW from 5V Supplies The LTC1668 is the first 16- bit dac in the marketplace to TTL/CMOS ( or 5V) Inputs exhibit an SFDR (spurious free dynamic range) of 87dB. Small Package: 28-Pin SSOP for an output signal frequency of 1 MHz. U Operating from 5V supplies, the LTC1666/LTC1667/. APPLICATIO S LTC1668 can be configured to provide full-scale output currents up to 10mA. The differential current outputs of Cellular Base Stations the DACs allow single-ended or true differential operation.

The LTC1668 is the first 16-bit DAC in the marketplace to exhibit an SFDR (spurious free dynamic range) of 87dB for an output signal frequency of 1MHz. Operating from ±5V supplies, the LTC1666/LTC1667/ LTC1668 can be configured to provide full-scale output currents up to 10mA. The differential current outputs of

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Transcription of LTC1666/LTC1667/LTC1668 - 12-Bit, 14-Bit, 16-Bit, 50Msps …

1 LTC1666/LTC1667/LTC1668 . 12-Bit, 14-Bit, 16-Bit, 50 Msps DACs U. FEATURES DESCRIPTIO. 50 Msps Update Rate The LTC 1666/LTC1667/LTC1668 are 12-/14-/16-bit, Pin Compatible 12-Bit, 14-Bit and 16-Bit Devices 50 Msps differential current output DACs implemented on High Spectral Purity: 87dB SFDR at 1 MHz fOUT a high performance BiCMOS process with laser trimmed, 5pV-s Glitch Impulse thin-film resistors. The combination of a novel current- Differential Current Outputs steering architecture and a high performance process 20ns Settling Time produces DACs with exceptional AC and DC performance. Low Power: 180mW from 5V Supplies The LTC1668 is the first 16- bit dac in the marketplace to TTL/CMOS ( or 5V) Inputs exhibit an SFDR (spurious free dynamic range) of 87dB. Small Package: 28-Pin SSOP for an output signal frequency of 1 MHz. U Operating from 5V supplies, the LTC1666/LTC1667/. APPLICATIO S LTC1668 can be configured to provide full-scale output currents up to 10mA. The differential current outputs of Cellular Base Stations the DACs allow single-ended or true differential operation.

2 Multicarrier Base Stations The 1V to 1V output compliance of the LTC1666/. Wireless Communication LTC1667/LTC1668 allows the outputs to be connected Direct Digital Synthesis (DDS) directly to external resistors to produce a differential out- xDSL Modems put voltage without degrading the converter's linearity. Al- Arbitrary Waveform Generation ternatively, the outputs can be connected to the summing Automated Test Equipment junction of a high speed operational amplifier, or to a Instrumentation transformer. The LTC1666/LTC1667/LTC1668 are pin compatible and are available in a 28-pin SSOP and are fully specified over the industrial temperature range. , LTC and LT are registered trademarks of Linear Technology Corporation. U. TYPICAL APPLICATION. LTC1668, 16-Bit, 50 Msps DAC. 5V. F LTC1668 SFDR vs fOUT and f CLOCK. VDD 100. REFOUT LTC1668. 5 MSPS. REFERENCE. F RSET. 2k IREFIN 90. 25 MSPS.. IOUT A. + 80 50 MSPS. SFDR (dB). + 16-BIT. HIGH SPEED VOUT 1VP-P. IOUT B DIFFERENTIAL. DAC 70.

3 COMP1. LADCOM 60. C1 COMP2. F. C2 VSS AGND DGND CLK DB15 DB0 DIGITAL AMPLITUDE = 0dBFS. 50. F 1666/7/8 TA01 10 100. CLOCK 16-BIT DATA fOUT (MHz). F. INPUT INPUT 1666/7/8 G05. 5V. 1. LTC1666/LTC1667/LTC1668 . W W W U. ABSOLUTE AXI U RATI GS (Note 1). Supply Voltage (VDD) .. 6V Power Dissipation .. 500mW. Negative Supply Voltage (VSS) .. 6V Operating Temperature Range Total Supply Voltage (VDD to VSS) .. 12V LTC1666C/LTC1667C/LTC1668C .. 0 C to 70 C. Digital Input Voltage .. to (VDD + ) LTC1666I/LTC1667I/LTC1668I .. 40 C to 85 C. Analog Output Voltage Storage Temperature Range .. 65 C to 150 C. (IOUT A and IOUT B) .. (VSS ) to (VDD + ) Lead Temperature (Soldering, 10 sec).. 300 C. U W U. PACKAGE/ORDER I FOR ATIO. TOP VIEW. ORDER PART. DB9 1 28 DB10 NUMBER. DB8 2 27 DB11 (MSB). DB7 3 26 CLK LTC1666CG. DB6 4 25 VDD LTC1666IG. DB5 5 24 DGND. DB4 6 23 VSS. DB3 7 22 COMP2. DB2 8 21 COMP1. DB1 9 20 IOUT A. DB0 (LSB) 10 19 IOUT B. NC 11 18 LADCOM. NC 12 17 AGND. NC 13 16 IREFIN. NC 14 15 REFOUT.

4 G PACKAGE. 28-LEAD PLASTIC SSOP. TJMAX = 110 C, JA = 100 C/W. TOP VIEW ORDER PART TOP VIEW ORDER PART. DB11 1 28 DB12 NUMBER DB13 1 28 DB14 NUMBER. DB10 2 27 DB13 (MSB) DB12 2 27 DB15 (MSB). DB9 3 26 CLK. LTC1667CG DB11 3 26 CLK. LTC1668CG. DB8 4 25 VDD. LTC1667IG DB10 4 25 VDD. LTC1668IG. DB7 5 24 DGND DB9 5 24 DGND. DB6 6 23 VSS DB8 6 23 VSS. DB5 7 22 COMP2 DB7 7 22 COMP2. DB4 8 21 COMP1 DB6 8 21 COMP1. DB3 9 20 IOUT A DB5 9 20 IOUT A. DB2 10 19 IOUT B DB4 10 19 IOUT B. DB1 11 18 LADCOM DB3 11 18 LADCOM. DB0 (LSB) 12 17 AGND DB2 12 17 AGND. NC 13 16 IREFIN DB1 13 16 IREFIN. NC 14 15 REFOUT DB0 (LSB) 14 15 REFOUT. G PACKAGE G PACKAGE. 28-LEAD PLASTIC SSOP 28-LEAD PLASTIC SSOP. TJMAX = 110 C, JA = 100 C/W TJMAX = 110 C, JA = 100 C/W. Consult LTC Marketing for parts specified with wider operating temperature ranges. 2. LTC1666/LTC1667/LTC1668 . ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25 C.

5 VDD = 5V, VSS = 5V, LADCOM = AGND = DGND = 0V, IOUTFS = 10mA. LTC1666 LTC1667 LTC1668. SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS. DC Accuracy (Measured at IOUT A, Driving a Virtual Ground). Resolution 12 14 16 Bits Monotonicity 12 14 14 Bits INL Integral Nonlinearity (Note 2) 1 2 8 LSB. DNL Differential Nonlinearity (Note 2) 1 1 1 4 LSB. Offset Error % FSR. Offset Error Drift 5 5 5 ppm/ C. GE Gain Error Internal Reference, RIREFIN = 2k 2 2 2 % FSR. External Reference, 1 1 1 % FSR. VREF = , RIREFIN = 2k Gain Error Drift Internal Reference 50 50 50 ppm/ C. External Reference 30 30 30 ppm/ C. PSRR Power Supply VDD = 5V 5% % FSR/V. Rejection Ratio VSS = 5V 5% % FSR/V. AC Linearity SFDR Spurious Free Dynamic fCLK = 25 Msps, fOUT = 1 MHz Range to Nyquist 0dB FS Output 76 78 78 87 dB. 6dB FS Output 87 dB. 12dB FS Output 83 dB. fCLK = 50 Msps, fOUT = 1 MHz 85 dB. fCLK = 50 Msps, fOUT = 81 dB. fCLK = 50 Msps, fOUT = 5 MHz 79 dB. fCLK = 50 Msps, fOUT = 20 MHz 70 dB.

6 Spurious Free Dynamic fCLK = 25 Msps, 85 86 86 96 dB. Range Within a Window fOUT = 1 MHz, 2 MHz Span fCLK = 50 Msps, 88 dB. fOUT = 5 MHz, 4 MHz Span THD Total Harmonic Distortion fCLK = 25 Msps, fOUT = 1 MHz 75 77 84 77 dB. fCLK = 50 Msps, fOUT = 5 MHz 78 dB. 3. LTC1666/LTC1667/LTC1668 . ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25 C. VDD = 5V, VSS = 5V, LADCOM = AGND = DGND = 0V, IOUTFS = 10mA. LTC1666/LTC1667/LTC1668 . SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS. Analog Output IOUTFS Full-Scale Output Current 1 10 mA. Output Compliance Range IFS = 10mA 1 1 V. Output Resistance; RIOUT A, RIOUT B IOUT A, B to LADCOM k . Output Capacitance 5 pF. Reference Output Reference Voltage REFOUT Tied to IREFIN Through 2k V. Reference Output Drift 25 ppm/ C. Reference Output Load Regulation ILOAD = 0mA to 5mA 6 mV/mA. Reference Input Reference Small-Signal Bandwidth IFS = 10mA, CCOMP1 = F 20 kHz Power Supply VDD Positive Supply Voltage 5 V.

7 VSS Negative Supply Voltage 5 V. IDD Positive Supply Current IFS = 10mA, fCLK = 25 Msps, fOUT = 1 MHz 3 5 mA. ISS Negative Supply Current IFS = 10mA, fCLK = 25 Msps, fOUT = 1 MHz 33 40 mA. PDIS Power Dissipation IFS = 10mA, fCLK = 25 Msps, fOUT = 1 MHz 180 mW. IFS = 1mA, fCLK = 25 Msps, fOUT = 1 MHz 85 mW. Dynamic Performance (Differential Transformer Coupled Output, 50 Double Terminated, Unless Otherwise Noted). fCLOCK Maximum Update Rate 50 75 Msps tS Output Settling Time To FSR 20 ns tPD Output Propagation Delay 8 ns Glitch Impulse Single Ended 15 pV-s Differential 5 pV-s tr Output Rise Time 4 ns tf Output Fall Time 4 ns iNO Output Noise 50 pA/ Hz Digital Inputs VIH Digital High Input Voltage V. VIL Digital Low Input Voltage V. IIN Digital Input Current 10 A. CIN Digital Input Capacitance 5 pF. tDS Input Setup Time 8 ns tDH Input Hold Time 4 ns tCLKH Clock High Time 5 ns tCLKL Clock Low Time 8 ns Note 1: Absolute Maximum Ratings are those values beyond which the life Note 2: For the LTC1666, 1 LSB = of full scale.

8 Of the device may be impaired. for the LTC1667, 1 LSB = of full scale = 61ppm of full scale;. for the LTC1668, 1 LSB = of full scale = of full scale. 4. LTC1666/LTC1667/LTC1668 . U W. TYPICAL PERFOR A CE CHARACTERISTICS (LTC1668). Single Tone SFDR at 50 MSPS 2-Tone SFDR 4-Tone SFDR, f CLOCK = 50 MSPS. 0 0 0. SFDR = 87dB SFDR > 86dB. 10 10 fCLOCK = 50 MSPS 10. fCLOCK = 50 MSPS. fOUT = 20 fOUT1 = 20. 20. SIGNAL AMPLITUDE (dBFS). SIGNAL AMPLITUDE (dBFS). SIGNAL AMPLITUDE (dBFS). AMPL = 0dBFS fOUT2 = SFDR > 74dB. 30 = 30 AMPL = 0dBFS 30 fCLOCK = 50 MSPS. 40 fOUT1 = 40 40 fOUT2 = 50 50 fOUT3 = 50. 60 fOUT4 = 60 60 AMPL = 0dBFS. 70. 70 70. 80. 80 80. 90. 90 90. 100. 100 100 110. 0 5 10 15 20 25 1 19. FREQUENCY (MHz) FREQUENCY (MHz) FREQUENCY (MHz). 1666/7/8 G01 1666/7/8 G02. 1666/7/8 G03. SFDR vs f OUT and Digital Amplitude 4-Tone SFDR, f CLOCK = 5 MSPS SFDR vs f OUT and fCLOCK (dBFS) at fCLOCK = 5 MSPS. 0 100 100. 10 5 MSPS. 95 0dBFS. 20 SFDR > 82dB 90 90 6dBFS. SIGNAL AMPLITUDE (dBFS).

9 30 fCLOCK = 5 MSPS. 25 MSPS 85 12dBFS. fOUT1 = 40 fOUT2 = 80 50 MSPS 80. SFDR (dB). SFDR (dB). 50 fOUT3 = fOUT4 = 75. 60 AMPL = 0dBFS. 70 70. 70. 65. 80. 90 60 60. 100 55. DIGITAL AMPLITUDE = 0dBFS. 110 50 50. 10 100 0 FREQUENCY (MHz) fOUT (MHz) fOUT (MHz). 1666/7/8 G05. 1666/7/8 G04 1666/7/8 G06. SFDR vs f OUT and Digital Amplitude SFDR vs f OUT and Digital Amplitude SFDR vs f OUT and IOUTFS at (dBFS) at fCLOCK = 25 MSPS (dBFS) at fCLOCK = 50 MSPS fCLOCK = 25 MSPS. 95 90 95. 0dBFS DIGITAL AMPLITUDE = 0dBFS. 90 85 90. 0dBFS IOUTFS = 10mA. 85 6dBFS 85. 80. 80 80. 12dBFS 75. SFDR (dB). SFDR (dB). SFDR (dB). 75 75 IOUTFS = 5mA. 70 6dBFS. 70 12dBFS 70 IOUTFS = 65. 65 65. 60 60 60. 55 55 55. 50 50 50. 0 2 4 6 8 10 0 5 10 15 20 0 5 10. fOUT (MHz) fOUT (MHz) fOUT (MHz). 1666/7/8 G07 1666/7/8 G08 1666/7/8 G09. 5. LTC1666/LTC1667/LTC1668 . U W. TYPICAL PERFOR A CE CHARACTERISTICS (LTC1668). SFDR vs Digital Amplitude (dBFS) SFDR vs Digital Amplitude (dBFS) Single-Ended Outputs and fCLOCK at fOUT = fCLOCK/11 and fCLOCK at fOUT = fCLOCK/5 Full-Scale Transition 100 100.

10 95 455kHz AT 5 MSPS 95. 90 90 1 MHz AT 5 MSPS. 85 85 5 MHz AT 25 MSPS. V(IOUTB). 80 80. SFDR (dB). SFDR (dB). AT 50 MSPS 100mV. 75 75 0000 FFFF. AT 25 MSPS /DIV. 70 70 10 MHz AT 50 MSPS. 65 65 V(IOUTA). 60 60. 55 55 CLK IN CLOCK INPUT. 5V/DIV. 50 50. 20 15 10 5 0 20 15 10 5 0 5ns/DIV. DIGITAL AMPLITUDE (dBFS) DIGITAL AMPLITUDE (dBFS) 1666/7/8 G12. 1666/7/8 G10 1666/7/8 G11. Differential Output Single-Ended Output Differential Output Full-Scale Transition Full-Scale Transition Full-Scale Transition V(IOUTA) V(IOUTB) V(IOUTA) V(IOUTB). V(IOUTA). 100mV 0000 100mV 100mV. FFFF FFFF 0000 FFFF 0000. /DIV /DIV /DIV. V(IOUTB). CLK IN CLK IN CLOCK INPUT CLK IN. 5V/DIV 5V/DIV 5V/DIV. 5ns/DIV 5ns/DIV 5ns/DIV. 1666/7/8 G13 1666/7/8 G14 1666/7/8 G15. Single-Ended Midscale Differential Midscale Glitch Impulse Glitch Impulse Integral Nonlinearity 5. V(IOUTA), V(IOUTB) V(IOUTA) V(IOUTB). 4. INTEGRAL NONLINEARITY (LSB). 3. 2. 7 FFF 8000 7 FFF 8000. 1. 1mV/DIV 1mV/DIV 0. 1. 2. CLK IN CLK IN 3. 5V/DIV 5V/DIV.


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