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Datasheet - STM32F103xC, STM32F103xD, STM32F103xE - …

July 2018DS5792 Rev 131/143 STM32F103xC, STM32F103xD, STM32F103xEHigh-density performance line Arm -based 32-bit MCU with 256 to 512 KBFlash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfacesDatasheet production dataFeatures Core: Arm 32-bit Cortex -M3 CPU 72 MHz maximum frequency, DMIPS/MHz (Dhrystone ) performance at 0 wait state memory access Single-cycle multiplication and hardware division Memories 256 to 512 Kbytes of Flash memory up to 64 Kbytes of SRAM Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management to V application supply and I/Os POR, PDR, and programmable voltage detector (PVD) 4-to-16 MHz crystal oscillator Internal 8 MHz factory-trimmed RC Internal 40 kHz RC with calibration 32 kHz oscillator for RTC with calibration Low power Sleep, Stop and Standby modes VBAT supply for RTC and backup registers 3 12-bit, 1 s A/D converters (up to 21 channels) Conversion range: 0 to V Triple-sample and hold capability Temperature sensor 2 12-bit D/A converters DMA: 12-channel DMA controller Supported peripherals: timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs Debug mode Serial wire debug (S)

July 2018 DS5792 Rev 13 1/143 STM32F103xC, STM32F103xD, STM32F103xE High-density performance line Arm®-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

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Transcription of Datasheet - STM32F103xC, STM32F103xD, STM32F103xE - …

1 July 2018DS5792 Rev 131/143 STM32F103xC, STM32F103xD, STM32F103xEHigh-density performance line Arm -based 32-bit MCU with 256 to 512 KBFlash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfacesDatasheet production dataFeatures Core: Arm 32-bit Cortex -M3 CPU 72 MHz maximum frequency, DMIPS/MHz (Dhrystone ) performance at 0 wait state memory access Single-cycle multiplication and hardware division Memories 256 to 512 Kbytes of Flash memory up to 64 Kbytes of SRAM Flexible static memory controller with 4 Chip Select. Supports Compact Flash, SRAM, PSRAM, NOR and NAND memories LCD parallel interface, 8080/6800 modes Clock, reset and supply management to V application supply and I/Os POR, PDR, and programmable voltage detector (PVD) 4-to-16 MHz crystal oscillator Internal 8 MHz factory-trimmed RC Internal 40 kHz RC with calibration 32 kHz oscillator for RTC with calibration Low power Sleep, Stop and Standby modes VBAT supply for RTC and backup registers 3 12-bit, 1 s A/D converters (up to 21 channels) Conversion range: 0 to V Triple-sample and hold capability Temperature sensor 2 12-bit D/A converters DMA: 12-channel DMA controller Supported peripherals.

2 Timers, ADCs, DAC, SDIO, I2Ss, SPIs, I2Cs and USARTs Debug mode Serial wire debug (SWD) & JTAG interfaces Cortex -M3 Embedded Trace Macrocell Up to 112 fast I/O ports 51/80/112 I/Os, all mappable on 16 external interrupt vectors and almost all 5 V-tolerant Up to 11 timers Up to four 16-bit timers, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input 2 16-bit motor control PWM timers with dead-time generation and emergency stop 2 watchdog timers (Independent and Window) SysTick timer: a 24-bit downcounter 2 16-bit basic timers to drive the DAC Up to 13 communication interfaces Up to 2 I2C interfaces (SMBus/PMBus) Up to 5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control) Up to 3 SPIs (18 Mbit/s), 2 with I2S interface multiplexed CAN interface ( Active) USB full speed interface SDIO interface CRC calculation unit, 96-bit unique ID ECOPACK packages Table summaryReferencePart numberSTM32F103xCSTM32F103RC STM32F103VC STM32F103 ZCSTM32F103xDSTM32F103RD STM32F103VD STM32F103 ZDSTM32F103xESTM32F103RE STM32F103ZE STM32F103 VELQFP64 10 10 mm, LQFP100 14 14 mm, LQFP144 20 20 mmLFBGA100 10 10 mmLFBGA144 10 10 , STM32F103xD, STM32F103xE2/143DS5792 Rev 13 Contents1 Introduction.

3 92 Description .. overview .. compatibility throughout the family .. Cortex -M3 core with embedded Flash and SRAM .. Flash memory .. (cyclic redundancy check) calculation unit .. SRAM .. (flexible static memory controller) .. parallel interface .. vectored interrupt controller (NVIC) .. interrupt/event controller (EXTI) .. and startup .. modes .. supply schemes .. supply supervisor .. regulator .. modes .. (real-time clock) and backup registers .. and watchdogs .. C bus .. synchronous/asynchronous receiver transmitters (USARTs) peripheral interface (SPI) .. sound (I2S) .. area network (CAN) .. serial bus (USB) .. (general-purpose inputs/outputs) .. (analog to digital converter) .. (digital-to-analog converter) .. sensor .. 24DS5792 Rev 133/143 STM32F103xC, STM32F103xD, wire JTAG debug port (SWJ-DP).

4 Trace Macrocell .. 243 Pinouts and pin descriptions .. 254 Memory mapping .. 405 Electrical characteristics .. conditions .. and maximum values .. values .. curves .. capacitor .. input voltage .. supply scheme .. consumption measurement .. maximum ratings .. conditions .. operating conditions .. conditions at power-up / power-down .. reset and power control block characteristics .. reference voltage .. current characteristics .. clock source characteristics .. clock source characteristics .. characteristics .. characteristics .. characteristics .. characteristics .. maximum ratings (electrical sensitivity) .. current injection characteristics .. port characteristics .. pin characteristics .. timer characteristics .. interfaces .. (controller area network) interface .. ADC characteristics.

5 106 ContentsSTM32F103xC, STM32F103xD, STM32F103xE4/143DS5792 Rev electrical specifications .. sensor characteristics .. 1136 Package information .. package information .. package information .. package information .. package information .. package information .. package information .. characteristics .. document .. the product temperature range .. 1337 Ordering information .. 1358 Revision history .. 136DS5792 Rev 135/143 STM32F103xC, STM32F103xD, STM32F103xEList of tables6 List of tablesTable summary .. 1 Table , STM32F103xD and STM32F103xE featuresand peripheral counts .. 11 Table family .. 14 Table timer feature comparison .. 19 Table STM32F103xC/D/E pin definitions.. 31 Table pin definition .. 38 Table characteristics .. 43 Table characteristics .. 43 Table characteristics.. 44 Table operating conditions .. 44 Table conditions at power-up / power-down.

6 45 Table reset and power control block characteristics.. 45 Table internal reference voltage .. 46 Table current consumption in Run mode, code with data processingrunning from Flash .. 47 Table current consumption in Run mode, code with data processingrunning from RAM.. 47 Table current consumption in Sleep mode, code running from Flash or RAM.. 49 Table and maximum current consumptions in Stop and Standby modes .. 50 Table current consumption in Run mode, code with data processingrunning from Flash .. 53 Table current consumption in Sleep mode, code running from Flash orRAM .. 54 Table current consumption .. 55 Table external user clock characteristics.. 58 Table external user clock characteristics .. 58 Table 4-16 MHz oscillator characteristics.. 60 Table oscillator characteristics (fLSE = kHz) .. 61 Table oscillator characteristics.. 62 Table oscillator characteristics.

7 63 Table mode wakeup timings .. 63 Table characteristics .. 64 Table memory characteristics .. 64 Table memory endurance and data retention .. 65 Table non-multiplexed SRAM/PSRAM/NOR read timings .. 67 Table non-multiplexed SRAM/PSRAM/NOR write timings .. 68 Table multiplexed PSRAM/NOR read timings.. 69 Table multiplexed PSRAM/NOR write timings .. 70 Table multiplexed NOR/PSRAM read timings .. 72 Table multiplexed PSRAM write timings .. 74 Table non-multiplexed NOR/PSRAM read timings .. 75 Table non-multiplexed PSRAM write timings .. 76 Table characteristics for PC Card/CF read and write cycles .. 81 Table characteristics for NAND Flash read and write cycles .. 85 Table characteristics .. 86 Table characteristics .. 87 Table absolute maximum ratings .. 87 List of tablesSTM32F103xC, STM32F103xD, STM32F103xE6/143DS5792 Rev 13 Table sensitivities.

8 88 Table current injection susceptibility .. 88 Table static characteristics .. 89 Table voltage characteristics .. 91 Table AC characteristics .. 93 Table pin characteristics .. 94 Table characteristics .. 95 Table characteristics.. 96 Table frequency (fPCLK1= 36 MHz.,VDD_I2C = V) .. 97 Table characteristics .. 98 Table characteristics .. 101 Table / MMC characteristics .. 103 Table startup time.. 104 Table DC electrical characteristics .. 105 Table : full-speed electrical characteristics .. 105 Table characteristics .. 106 Table max for fADC = 14 MHz .. 107 Table accuracy - limited test conditions .. 107 Table accuracy .. 108 Table characteristics .. 111 Table characteristics .. 113 Table 144-ball low profile fine pitch ball grid array, 10 x 10 mm, mm pitch, package mechanical data .. 114 Table recommended PCB design rules ( mm pitch BGA).

9 115 Table - 10 x 10 mm low profile fine pitch ball grid array packagemechanical data .. 117 Table recommended PCB design rules ( mm pitch BGA).. 118 Table , 64-ball mm, mm pitch, wafer-level chip-scalepackage mechanical data .. 120 Table recommended PCB design rules ( mm pitch) .. 121 Table - 144-pin, 20 x 20 mm low-profile quad flat package mechanical data .. 123 Table 14 x 14 mm 100-pin low-profile quad flat package mechanical data .. 126 Table 10 x 10 mm 64 pin low-profile quad flat package mechanical data .. 129 Table thermal characteristics .. 132 Table information scheme .. 135DS5792 Rev 137/143 STM32F103xC, STM32F103xD, STM32F103xEList of figures8 List of figuresFigure , STM32F103xD and STM32F103xE performance line block diagram .. 12 Figure tree .. 13 Figure BGA144 ballout .. 25 Figure performance line BGA100 ballout.. 26 Figure performance line LQFP144 pinout.

10 27 Figure performance line LQFP100 pinout .. 28 Figure performance line LQFP64 pinout .. 29 Figure performance lineWLCSP64 ballout, ball side .. 30 Figure map .. 40 Figure loading conditions .. 41 Figure input voltage .. 41 Figure supply scheme.. 42 Figure consumption measurement scheme .. 42 Figure current consumption in Run mode versus frequency (at V) -code with data processing running from RAM, peripherals enabled .. 48 Figure current consumption in Run mode versus frequency (at V)-code with data processing running from RAM, peripherals disabled .. 48 Figure current consumption on VBAT with RTC on vs. temperatureat different VBAT values.. 51 Figure current consumption in Stop mode with regulator in run modeversus temperature at different VDD values .. 51 Figure current consumption in Stop mode with regulator in low-powermode versus temperature at different VDD values.


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