Presettable synchronous 4-bit binary counter; synchronous ...

1 74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronousresetRev. 5 12 October 2018 Product data sheet1. General descriptionThe 74HC163; 74 HCT163 is a synchronous Presettable binary counter with an internal look-headcarry. synchronous operation is provided by having all flip-flops clocked simultaneously on thepositive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset toa HIGH or LOW. A LOW at the parallel enable input (PE) disables the counting action. It causesthe data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge ofthe clock. Preset takes place regardless of the levels at count enable inputs (CEP and CET).

2 ALOW at the master reset input (MR) sets Q0 to Q3 LOW after the next positive-going transitionon the clock input (CP). This action occurs regardless of the levels at input pins PE, CET andCEP. This synchronous reset feature enables the designer to modify the maximum count withonly one external NAND gate. The look-ahead carry simplifies serial cascading of the CEP and CET must be HIGH to count. The CET input is fed forward to enable the terminalcount output (TC). The TC output thus enabled will produce a HIGH output pulse of a durationapproximately equal to a HIGH output of Q0. This pulse can be used to enable the next cascadedstage. Inputs include clamp diodes. This enables the use of current limiting resistors to interfaceinputs to voltages in excess of CP to TC propagation delay and CEP to CP set-up time determine the maximum clockfrequency for the cascaded counters according to the following formula:2.

3 Features and benefits Complies with JEDEC standard no. 7A input levels: For 74HC163: CMOS level For 74 HCT163: TTL level synchronous counting and loading 2 count enable inputs for n-bit cascading synchronous reset Positive-edge triggered clock ESD protection: HBM JESD22-A114F exceeds 2 000 V MM JESD22-A115-A exceeds 200 V Multiple package options Specified from -40 C to +85 C and -40 C to +125 C3. Ordering informationTable 1. Ordering informationPackageType numberTemperature rangeNameDescriptionVersion74HC163D74 HCT163D-40 C to +125 CSO16plastic small outline package; 16 leads;body width mmSOT109-1 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous resetPackageType numberTemperature rangeNameDescriptionVersion74HC163DB74 HCT163DB-40 C to +125 CSSOP16plastic shrink small outline package;16 leads; body width mmSOT338-174HC163PW74 HCT163PW-40 C to +125 CTSSOP16plastic thin shrink small outline package;16 leads; body width mmSOT403-14.

4 Functional diagramaaa-012184TC15 CEPCETCPMR71021 PED0D1D2D393456Q0Q1Q2Q314131211 Fig. symbolPEaaa-0121863 PARALLELLOAD CIRCUITRYBINARYCOUNTER911072141315 TCMRCETCEPCP1211456D0D1D2D3Q0 INHDCPQ1Q2Q3 Fig. diagramaaa-0121853210791C2/1,3,4+G4G3M1 CTR42R1,2D45141312611154CT = 15 Fig. logic symbol74HC_HCT163 All information provided in this document is subject to legal disclaimers. Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20182 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous resetaaa-012189 DQQCPFF1Q0 DQQCPFF2Q1 DQQCPFF3Q2DD0 CETCEPPEMRCPD1D2D3 QQCPFF4Q3 TCFig. diagram74HC_HCT163 All information provided in this document is subject to legal disclaimers.

5 Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20183 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous reset5. Pinning PinningMRVCCCPTCD0Q0D1Q1D2Q2D3Q3 CEPCETGNDPEaaa-0121811234567810912111413 161574HC16374 HCT163 Fig. configuration SOT109-1 (SO16)74HC16374 HCT163 MRVCCCPTCD0Q0D1Q1D2Q2D3Q3 CEPCETGNDPEaaa-0121821234567810912111413 1615 Fig. configuration SOT338-1 (SSOP16) andSOT403-1 (TSSOP16) Pin descriptionTable 2. Pin descriptionSymbolPinDescriptionMR1synchr onous master reset (active LOW)CP2clock input (LOW-to-HIGH, edge triggered)D0, D1, D2, D33, 4, 5, 6data inputCEP7count enable inputGND8ground (0 V)PE9parallel enable input (active LOW)CET10count enable carry inputQ0, Q1, Q2, Q314, 13, 12, 11flip-flop outputTC15terminal count outputVCC16supply voltage74HC_HCT163 All information provided in this document is subject to legal disclaimers.

6 Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20184 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous reset6. Functional descriptionTable 3. Function table[1]InputsOutputsOperating modeMRCPCEPCETPEDnQnTCReset (clear)I XXXXLLh XXIILLP arallel loadh XXIhHLCounth hhhXcounthXIXhXqnLHold (do nothing)hXXIhXqnL[1]The TC output is HIGH when CET is HIGH and the counter is at terminal count (HHHH);H = HIGH voltage level;h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition;L = LOW voltage level;I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition;q = lower case letters indicate the state of the referenced output one set-up time prior to the LOW-to-HIGH CP transition;X = don t care.

7 = LOW-to-HIGH clock diagram74HC_HCT163 All information provided in this document is subject to legal disclaimers. Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20185 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous resetaaa-0121881213countpresetresetinhib it1415012 MRPED0D1D2D3 CPCEPCETQ0Q1Q2Q3 TCSequencereset outputs to zero; preset to binary 12; count to 13, 14, 15, zero, one and two; timing sequence7. Limiting valuesTable 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).SymbolParameterConditionsMinMaxUnitVC Csupply + clamping currentVI < V or VI > VCC + V- 20mAIOK output clamping currentVO < V or VO > VCC + V- 20mAIOoutput currentVO = V to VCC + V- 25mAICC supply current-50mAIGND ground current-50-mATstgstorage temperature-65+150 CSO16 package[1]-500mWPtottotal power dissipation(T)SSOP16 package[1]-500mW[1]For SO16 packages: above 70 C the value of Ptot derates linearly at 8 (T)SSOP16 packages: above 60 C the value of Ptot derates linearly at information provided in this document is subject to legal disclaimers.

8 Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20186 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous reset8. Recommended operating conditionsTable 5. Recommended operating conditionsVoltages are referenced to GND (ground = 0 V)74HC16374 HCT163 SymbolParameterConditionsMinTypMaxMinTyp MaxUnitVCCsupply voltage0-VCC0-VCCVVO output voltage0-VCC0-VCCVT ambambient temperature-40+25+125-40+25+125 CVCC = V--625---ns/VVCC = t/ Vinput transition rise and fall rateVCC = V--83---ns/V9. Static characteristicsTable 6. Static characteristicsAt recommended operating conditions; voltages are referenced to GND (ground = 0 V).25 C-40 C to +85 C-40 C to +125 CSymbolParameterConditionsMinTypMaxMinMa xMinMaxUnit74HC163 VCC = = voltageVCC = = = voltageVCC = = VIH or VILIO = -20 A; VCC = = -20 A; VCC = = -20 A; VCC = = ; VCC = voltageIO = ; VCC = = VIH or VILIO = 20 A; VCC = = 20 A; VCC = = 20 A; VCC = = mA; VCC = voltageIO = mA; VCC = leakagecurrentVI = VCC or GND; VCC = V-- AICC supply currentVI = VCC or GND; IO = 0 A;VCC = information provided in this document is subject to legal disclaimers.

9 Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20187 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous reset25 C-40 C to +85 C-40 C to +125 CSymbolParameterConditionsMinTypMaxMinMa xMinMaxUnit74 HCT163 VIHHIGH-levelinput voltageVCC = V to voltageVCC = V to = VIH or VIL; VCC = VIO = -20 voltageIO = = VIH or VIL; VCC = VIO = 20 voltageIO = leakagecurrentVI = VCC or GND; VCC = V-- AICC supply currentVI = VCC or GND; IO = 0 A;VCC = Aper input pin; VI = VCC - V;other inputs at VCC or GND;VCC = V to V; IO = 0 Apin Apin CP-110396-495-539 Apin CEP and Apin A ICCadditionalsupply currentpin PE-30108-135-147 information provided in this document is subject to legal disclaimers.

10 Nexperia 2018. All rights reservedProduct data sheetRev. 5 12 October 20188 / 20 Nexperia74HC163; 74 HCT163 Presettable synchronous 4-bit binary counter; synchronous reset10. Dynamic characteristicsTable 7. Dynamic characteristicsVoltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Fig. C-40 C to +85 C-40 C to +125 CSymbolParameterConditionsMinTypMaxMinMa xMinMaxUnit74HC163CP to Qn; see Fig. 9[1]VCC = V-55185-230-280nsVCC = V-2037-46-56nsVCC = V; CL = 15 pF-17-----nsVCC = V-1631-39-48nsCP to TC; see Fig. 9 VCC = V-69215-270-320nsVCC = V-2543-54-65nsVCC = V; CL = 15 pF-21-----nsVCC = V-2037-46-55nsCET to TC; see Fig.