DC to 28 GHz, GaAs, pHEMT, MMIC, Low Noise …

1 DC to 28 GHz, gaas , phemt , MMIC, Low Noise amplifier data sheet hmc8401 Rev. B Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2016 2018 analog devices , Inc.

2 All rights reserved. Technical Support FEATURES Output power for 1 dB compression (P1dB): dBm typical Saturated output power (PS AT): 19 dBm typical Gain: dB typical Noise figure: dB Output third order intercept (IP3): 26 dBm typical Supply voltage: V at 60 mA 50 matched input/output Die size: mm x mm x mm APPLICATIONS Test instrumentation Microwave radios and very small aperture terminals (V S ATs) Military and space Telecommunications infrastructure Fiber optics GENERAL DESCRIPTION The hmc8401 is a gallium arsenide ( gaas ), pseudomorphic high electron mobility transistor ( phemt ), monolithic microwave integrated circuit (MMIC). The hmc8401 is a wideband lo w Noise amplifier which operates between dc and 28 GHz.

3 The amplifier provides dB of gain, dB Noise figure, 26 dBm output IP3 and dBm of output power at 1 dB gain compression while requiring 60 mA from a V supply. The hmc8401 also has a gain control option, VGG2. The hmc8401 amplifier input/ outputs are internally matched to 50 facilitating integration into multichip modules (MCMs). All data is taken with the chip connected via two mm (1 mil) wire bonds of minimal length mm (12 mils). FUNCTIONAL BLOCK DIAGRAM VDDACGVGG1 ACGACG342 RFINVGG2 RFOUT1587613850-001 hmc8401 Figure 1. hmc8401 data sheet Rev. B | Page 2 of 17 TABLE OF CONTENTS Features .. 1 Applications .. 1 General Description .. 1 Functional Block Diagram.

4 1 Revision History .. 2 Specifications .. 3 GHz to 3 GHz Frequency Range .. 3 3 GHz to 26 GHz Frequency Range .. 3 26 GHz to 28 GHz Frequency Range .. 4 Absolute Maximum Ratings .. 5 ESD Caution .. 5 Pin Configuration and Function Descriptions .. 6 Interface Schematics ..7 Typical Performance Characteristics ..8 Theory of Operation .. 14 Applications Information .. 15 Biasing Procedures .. 15 Mounting and Bonding Techniques for Millimeterwave gaas MMICs .. 15 Typical Application Circuit .. 16 Assembly Diagram .. 16 Outline Dimensions .. 17 Ordering Guide .. 17 REVISION HISTORY 4/2018 Rev. A to Rev. B Changes to Features 1 Updated Outline Dimensions .. 17 Changes to Ordering Guide.

5 17 9/2017 R e v. 0 t o R e v. A Changes to Supply Voltage Parameter, Table 1 .. 3 Changes to Supply Voltage Parameter, Table 2 .. 3 Changes to Supply Voltage Parameter, Table 3 .. 4 Changes to Thermal Resistance, JC (Channel to Die Bottom) Parameter Heading, Table 4 .. 5 Changes to Table 5 .. 6 Changes to Figure 7 .. 7 Added Figure 41; Renumbered Sequentially .. 13 7/ 2016 Revision 0: Initial Ve r s i o n data sheet hmc8401 Rev. B | Page 3 of 17 SPECIFICATIONS GHz TO 3 GHz FREQUENCY RANGE TA = 25 C, VDD = V, IDQ = 60 mA, VGG2 = open, unless otherwise When using VGG2, it is recommended to limit VGG2 from 2 V to + V. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit FREQUENCY RANGE 3 GHz GAIN 13 15 dB Gain Variation Over Temperature dB/ C RETURN LOSS Input 14 dB Output 19 dB OUTPUT Output Power for 1 dB Compression P1dB 17 dBm Saturated Output Power PS AT 19 dBm Output Third Order Intercept IP3 Measurement taken at POUT/tone = 10 dBm 27 dBm Noise FIGURE NF dB SUPPLY CURRENT Total Supply Current IDQ 60 mA SUPPLY VOLTAGE VDD V 1 Adjust the VGG1 supply voltage between 2 V and 0 V to achieve IDQ = 60 mA typical.

6 3 GHz TO 26 GHz FREQUENCY RANGE TA = 25 C, VDD = V, IDQ = 60 mA, VGG2 = open, unless otherwise When using VGG2, it is recommended to limit VGG2 from 2 V to + V. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit FREQUENCY RANGE 3 26 GHz GAIN dB Gain Variation Over Temperature dB/ C RETURN LOSS Input 16 dB Output 17 dB OUTPUT Output Power for 1 dB Compression P1dB 14 dBm Saturated Output Power PS AT 19 dBm Output Third Order Intercept IP3 Measurement taken at POUT/tone = 10 dBm 26 dBm Noise FIGURE NF dB SUPPLY CURRENT Total Supply Current IDQ 60 mA SUPPLY VOLTAGE VDD V 1 Adjust the VGG1 supply voltage between 2 V and 0 V to achieve IDQ= 60 mA typical.

7 hmc8401 data sheet Rev. B | Page 4 of 17 26 GHz TO 28 GHz FREQUENCY RANGE TA = 25 C, VDD = V, IDQ = 60 mA, VGG2 = open, unless otherwise When using VGG2, it is recommended to limit VGG2 from 2 V to + V. Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit FREQUENCY RANGE 26 28 GHz GAIN dB Gain Variation Over Temperature dB/ C RETURN LOSS Input 15 dB Output 17 dB OUTPUT Output Power for 1 dB Compression P1dB 14 dBm Saturated Output Power PS AT 17 dBm Output Third Order Intercept IP3 Measurement taken at POUT/tone = 10 dBm 24 dBm Noise FIGURE NF 2 4 dB SUPPLY CURRENT Total Supply Current IDQ 60 mA SUPPLY VOLTAGE VDD V 1 Adjust the VGG1 supply voltage between 2 V and 0 V to achieve IDQ = 60 mA typical.

8 data sheet hmc8401 Rev. B | Page 5 of 17 ABSOLUTE MAXIMUM RATINGS Table 4. Parameter Rating Drain Bias Voltage (VDD) +10 V Second Gate Bias Voltage (VGG2) V to + RF Input Power (RFIN) 20 dBm Channel Temperature 175 C Continuous Power Dissipation (PDISS), TA = 85 C (Derate mW/ C Above 85 C) Thermal Resistance, JC (Channel to Die Bottom) 54 C/W Storage Temperature Range 65 C to +150 C Operating Temperature Range 55 C to +85 C ESD Sensitivity, Human Body Model (HBM) Class 1A, 250 V Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied.

9 Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION hmc8401 data sheet Rev. B | Page 6 of 17 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 342 ADI20141876513850-002 hmc8401 Figure 2. Pad Configuration Table 5. Pad Function Descriptions Pad No. Mnemonic Description 1 RFIN Radio Frequency (RF) Input. This pad is dc coupled and matched to 50 . See Figure 3 for the interface schematic. 2 VGG2 Gain Control. This pad is dc-coupled and accomplishes gain control by bringing this voltage lower and becoming more negative. Attach bypass capacitors to this pad as shown in Figure 44. See Figure 4 for the interface schematic.

10 3 VDD Power Supply Voltage for the amplifier . Connect a dc bias to provide drain current (IDD). Attach bypass capacitors to this pad as shown in Figure 44. See Figure 5 for the interface schematic. 4, 6, 7 ACG Low Fr equency Termination. Attach bypass capacitors to this pad as shown in Figure 44. See Figure 6 for the interface schematic. 5 RFOUT Radio Frequency (RF) Output. This pad is dc coupled and matched to 50 . See Figure 3 for the interface schematic. 8 VGG1 Gate Control for the A mplifier. Adjust VGG1 to achieve the recommended bias current. Attach bypass capacitors to this pad as shown in Figure 44. See Figure 8 for the interface schematic. Die Bottom GND Die Bottom.