Low Power HDMI Display Interface AD9393 - …

1 Low Power hdmi Display Interface AD9393 Rev. 0 Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, : Fax: 2009 analog devices , Inc. All rights reserved. FEATURES hdmi Interface Supports high bandwidth digital content protection RGB to YCrCb 2-way color conversion V Power supply 76-ball BGA package RGB and YCrCb output formats Digital video Interface hdmi , DVI 80 MHz hdmi receiver Supports high bandwidth digital content protection (HDCP ) Digital audio Interface hdmi audio Interface S/PDIF (IEC60958-compatible) digital audio output Multichannel I2S audio output (up to 8 channels) APPLICATIONS Portable low Power TV HDTV Projectors LCD monitor FUNCTIONAL BLOCK DIAGRAM 08043-001 DATACKDEVSYNCHDMIRECEIVERSPDIF8-CHANNELI 2 SSCLKLRCLKHDCPHSOUTD[23:0]VSOUTDECOLORSP ACE CONVERTERR/G/B 8 3OR YCrCbAD9393 SCLSDARx1+Rx1 Rx2+Rx2 RxC+RxC RTERMMCLMDADDC_SCLDDC_SDARx0+Rx0 HSYNCDCLKYCrCb RGBSERIALREGISTERANDPOWERMANAGEMENTMCLK Figure 1.

2 GENERAL DESCRIPTION The AD9393 offers a High-Definition Multimedia Interface ( hdmi ) receiver integrated on a single chip. Support is also included for high bandwidth digital content protection (HDCP). The AD9393 contains a hdmi receiver and supports HDTV formats (up to 720p or 1080i) and displays resolutions up to XGA (1024 768 @ 75 Hz). The receiver features an intrapair skew tolerance of up to one full clock cycle. With the inclusion of HDCP, displays may now receive encrypted video content. The AD9393 allows for authentication of a video receiver, decryption of encoded data at the receiver, and renewability of that authentication during transmission as specified by the HDCP protocol. Fabricated in an advanced CMOS process, the AD9393 is provided in a space-saving 76-ball, surface-mount, Pb-free, ball grid array (BGA) and is specified over the 10 C to +80 C temperature range. AD9393 Rev. 0 | Page 2 of 40 TABLE OF CONTENTS Features.

3 1 Applications .. 1 Functional Block Diagram .. 1 General Description .. 1 Revision History .. 2 Specifications .. 3 Electrical Characteristics .. 3 Digital Interface Electrical Characteristics .. 4 Absolute Maximum Ratings .. 5 Explanation of Test Levels .. 5 ESD Caution .. 5 Pin Configuration and Function Descriptions .. 6 Design Guide .. 8 General Description .. 8 Digital Inputs .. 8 Serial Control Port .. 8 Output Signal Handling .. 8 Power Management .. 8 Timing .. 9 hdmi Receiver .. 9 DE Generator .. 9 4:4:4 to 4:2:2 Filter .. 9 Audio PLL Setup .. 10 Audio Board Level Muting .. 11 Output Data Formats .. 11 2-Wire Serial Register Map .. 12 2-Wire Serial Control Register Details .. 22 Chip Identification .. 22 BT656 Generation .. 24 Color Space Conversion .. 25 2-Wire Serial Control Port .. 31 Data Transfer via Serial Interface .. 31 Serial Interface Read/Write Examples .. 32 PCB Layout Recommendations .. 33 Power Supply Bypassing.

4 33 Outputs (Both Data and Clocks) .. 33 Digital Inputs .. 33 Color Space Converter (CSC) Common Settings .. 34 HDTV YCrCb (0 to 255) to RGB (0 to 255) (Default Setting for AD9393 ) .. 34 HDTV YCrCb (16 to 235) to RGB (0 to 255).. 34 SDTV YCrCb (0 to 255) to RGB (0 to 255) .. 34 SDTV YCrCb (16 to 235) to RGB (0 to 255) .. 35 RGB (0 to 255) to HDTV YCrCb (0 to 255) .. 35 RGB (0 to 255) to HDTV YCrCb (16 to 235).. 35 RGB (0 to 255) to SDTV YCrCb (0 to 255) .. 36 RGB (0 to 255) to SDTV YCrCb (16 to 235) .. 36 Outline Dimensions .. 37 Ordering Guide .. 37 REVISION HISTORY 10/09 Revision 0: Initial Version AD9393 Rev. 0 | Page 3 of 40 SPECIFICATIONS ELECTRICAL CHARACTERISTICS VDD, VD = V, DVDD = PVDD = V, unless otherwise noted. Table 1. Parameter Temp Test Level Min Typ Max Unit DIGITAL INPUTS (5 V Tolerant) Input Voltage, High (VIH)

5 Full VI V Input Voltage, Low (VIL) Full VI V Input Current, High (IIH) Full V 82 A Input Current, Low (IIL) Full V 82 A Input Capacitance 25 C V 3 pF DIGITAL OUTPUTS Output Voltage, High (VOH)

6 Full VI VDD V Output Voltage, Low (VOL) Full VI V Duty Cycle, DCLK Full V 45 50 55 % Output Coding Binary THERMAL CHARACTERISTICS JA Junction-to-Ambient V 59 C/W JC Junction-to-Case V C/W AD9393 Rev. 0 | Page 4 of 40 DIGITAL Interface ELECTRICAL CHARACTERISTICS VDD = VD = V, DVDD = PVDD = V, unless otherwise noted. Table 2. Parameter Test Level Conditions Min Typ Max Unit DC DIGITAL I/O Specifications High-Level Input Voltage (VIH) VI V Low-Level Input Voltage (VIL)

7 VI V High-Level Output Voltage (VOH) VI VDD V Low-Level Output Voltage (VOL) VI VDD V DC SPECIFICATIONS Output High Level IV Output drive = high strength 36 mA IOHD (VOUT = VOH) IV Output drive = low strength 24 mA Output Low Level IV Output drive = high strength 12 mA IOLD (VOUT = VOL) IV Output drive = low strength 8 mA DCLK High Level IV Output drive = high strength 40 mA VOHC (VOUT = VOH) IV Output drive = low strength 20 mA DCLK Low Level IV Output drive = high strength 30 mA VOLC (VOUT = VOL)

8 IV Output drive = low 15 mA Differential Input Voltage, Single-Ended Amplitude IV 75 700 mV Power SUPPLY VD IV V VDD

9 IV 347 V DVDD IV V PVDD IV

10 V Power 54 MHz, YCrCb 422, CSC Disabled 485 mW Supply Current (Worst Pattern)1 IVD V 95 mA IVDD V 18 mA IDVDD2 V 51 mA IPVDD V