Ultracompact, 1 A Thermoelectric Cooler (TEC) Driver for ...

1 Ultracompact, 1 A Thermoelectric Cooler (TEC) Driver for Digital Control Systems Data Sheet ADN8833 Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2015 2018 Analog Devices, Inc. All rights reserved. Technical Support FEATURES Patented high efficiency single inductor architecture Integrated low RDSON MOSFETs for TEC Driver TEC voltage and current operation monitoring No external sense resistor required Independent TEC heating and cooling current limit settings Programmable maximum TEC voltage 2 MHz PWM Driver switching frequency External synchronization Digital thermal control loop compatible V reference output with 1% accuracy Available in a 25-ball, mm mm WLCSP or in a 24-lead.

2 4 mm 4 mm LFCSP APPLICATIONS TEC temperature control Optical modules Optical fiber amplifiers Optical networking systems Instruments requiring TEC temperature control FUNCTIONAL BLOCK DIAGRAM TEC CURRENTAND VOLTAGESENSEAND LIMITCONTROLLERLINEARPOWERSTAGEADN8833 PWMPOWERSTAGEOSCILLATORVOLTAGEREFERENCEI LIMVLIM/SDVTECITECEN/SYVREFLDRSWSFBCONTP VINPGNDxVDDAGND12909-001 Figure 1. GENERAL DESCRIPTION The ADN88331 is a monolithic H-bridge TEC Driver with integrated 1 A power MOSFETs. It has a linear power stage with the linear Driver (LDR) output and a pulse-width modulation (PWM) power stage with the SW output. Depending on the control voltage at the CONT input, the ADN8833 drives current through a TEC to settle the temperature of a laser diode or a passive component attached to the TEC module to the programmed target temperature.

3 The control voltage applied to the CONT input is generated by a digital-to -analog converter (DAC) closing the digital proportional, integral, derivative (PID) loop of temperature control system. The internal V reference voltage provides a 1% accurate output that is used to bias a voltage divider network to program the maximum TEC current and voltage limits for both the heating and cooling modes. It can a lso be a reference voltage for the DAC and the temperature sensing circuit, including a thermistor bridge and an analog-to-digital converter (ADC). Table 1. TEC Family Models Model MOSFET Thermal Loop Package ADN8831 Discrete Digital/analog LFCSP (CP-32-7) ADN8833 Integrated Digital WLCSP (CB-25-7), LFCSP (CP-24-15) ADN8834 Integrated Digital/analog WLCSP (CB-25-7), LFCSP (CP-24-15) 1 Product is covered by US Patent No.

4 6,486,643. ADN8833 Data Sheet Rev. B | Page 2 of 23 TABLE OF CONTENTS Features .. 1 Applications .. 1 Functional Block Diagram .. 1 General Description .. 1 Revision History .. 2 Specifications .. 3 Absolute Maximum Ratings .. 6 Thermal Resistance .. 6 ESD Caution .. 6 Pin Configurations and Function Descriptions .. 7 Typical Performance Characteristics .. 8 Detailed Functional Block Diagram .. 12 Theory of Operation .. 13 Digital PID Control .. 13 Powering the Driver .. 13 Enable and Shutdown .. 14 Oscillator Clock Frequency .. 14 Soft Start on Power-Up .. 14 TEC Voltage/Current Monitor .. 15 Maximum TEC Voltage Limit .. 15 Maximum TEC Current Limit .. 15 Applications Information .. 16 Typical Application with Digital PID Using a DAC .. 16 Thermistor Setup .. 16 MOSFET Driver Amplifiers.

5 16 PWM Output Filter Requirements .. 17 Input Capacitor Selection .. 18 Power 18 PCB Layout Guidelines .. 20 Block Diagrams and Signal Flow .. 20 Guidelines for Reducing Noise and Minimizing Power Loss .. 20 Example PCB Layout Using Two Layers .. 21 Outline Dimensions .. 23 Ordering Guide .. 23 REVISION HISTORY 8/2018 Rev. A to Rev. B Added Patent Information .. 1 8/2015 Rev. 0 to Rev. A Added 24-Lead LFCSP .. Universal Changes to Features Section and Table 1 .. 1 Changes to Table 2 .. 3 Changes to Table 3 .. 6 Added Figure 3; Renumbered Sequentially .. 7 Changes to Figure 11 .. 9 Changes to Figure 18 and Figure 19 .. 10 Changes to Figure 23 .. 12 Changes to Powering the Driver Section and Figure 24 Caption .. 13 Change to Soft Start on Power-Up Section .. 14 Changes to Table 7.

6 17 Added Table 8; Renumbered Sequentially .. 18 Updated Outline Dimensions .. 23 Changes to Ordering Guide .. 23 4/2015 Revision 0: Initial Version Data Sheet ADN8833 Rev. B | Page 3 of 23 SPECIFICATIONS VIN = V to V, TJ = 40 C to +125 C for minimum/maximum specifications, and TA =25 C for typical specifications, unless otherwise noted. Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit POWER SUPPLY Driver Supply Voltage VPVIN WLCSP V VPVINL, VPVINS LFCSP V Controller Supply Voltage VVDD V Supply Current IVDD PWM not switching mA Shutdown Current ISD EN/SY = AGND or VLIM/SD = AGND 350 700 A Undervoltage Lockout (UVLO) VUVLO VVDD rising V UVLO Hysteresis UVLOHYST 80 90 100 mV REFERENCE VOLTAGE VVREF IVREF = 0 mA to 10 mA V LINEAR OUTPUT Output Voltage VLDR ILDR = 0 A Low 0 V High VPVIN V Maximum Source Current ILDR_SOURCE TJ = 40 C to +125 C A Maximum Sink Current ILDR_SINK TJ = 40 C to +125 C A On Resistance ILDR = A P-MOSFET RDS_PL(ON)

7 WLCSP, VPVIN = V 35 50 m WLCSP, VPVIN = V 44 60 m LFCSP, VPVIN = V 50 65 m LFCSP, VPVIN = V 55 75 m N-MOSFET RDS_NL(ON) WLCSP, VPVIN = V 31 50 m WLCSP, VPVIN = V 40 55 m LFCSP, VPVIN = V 45 70 m LFCSP, VPVIN = V 50 80 m Leakage Current P-MOSFET ILDR_P_LKG 10 A N-MOSFET ILDR_N_LKG 10 A Linear Amplifier Gain ALDR 40 V/V LDR Short-Circuit Threshold ILDR_SH_GNDL LDR short to PGNDL, enter hiccup A ILDR_SH_PVIN LDR short to PVIN, enter hiccup A Hiccup Cycle THICCUP 15 ms PWM OUTPUT Output Voltage VSFB ISFB = 0 A Low VPVIN V High VPVIN V Maximum Source Current ISW_SOURCE TJ = 40 C to +125 C A Maximum Sink Current ISW_SINK TJ = 40 C to +125 C A On Resistance ISW = A P-MOSFET RDS_PS(ON)

8 WLCSP, VPVIN = V 47 65 m WLCSP, VPVIN = V 60 80 m LFCSP, VPVIN = V 60 80 m LFCSP, VPVIN = V 70 95 m N-MOSFET RDS_NS(ON) WLCSP, VPVIN = V 40 60 m WLCSP, VPVIN = V 45 65 m LFCSP, VPVIN = V 45 75 m LFCSP, VPVIN = V 55 85 m ADN8833 Data Sheet Rev. B | Page 4 of 23 Parameter Symbol Test Conditions/Comments Min Typ Max Unit Leakage Current P-MOSFET ISW_P_LKG 10 A N-MOSFET ISW_N_LKG 10 A SW Node Rise Time1 tSW_R CSW = 1 nF 1 ns PWM Duty Cycle2 DSW 6 93 % SFB Input Bias Current ISFB 1 2 A PWM OSCILLATOR Internal Oscillator Frequency fOSC EN/SY high MHz EN/SY Input Voltage Low VEN/SY_ILOW V High VEN/SY_IHIGH V External Synchronization Frequency fSYNC MHz Synchronization Pulse Duty Cycle DSYNC 10 90 % EN/SY Rising to PWM Rising Delay tSYNC_PWM 50 ns EN/SY to PWM Lock Time tSY_LOCK Number of SYNC cycles 10 Cycles EN/SY Input Current IEN/SY A Pull-Down Current A Driver CONTROL INPUT Input Voltage Range VCONT 0 VVREF V

9 Input Resistance RCONT 40 k Input Capacitance1 CCONT 40 pF TEC CURRENT LIMIT ILIM Input Voltage Range Cooling VILIMC VVREF V Heating VILIMH V Current-Limit Threshold Cooling VILIMC_TH VITEC = V V Heating VILIMH_TH VITEC = 2 V V ILIM Input Current Heating IILIMH + A Cooling IILIMC Sourcing current 40 A Cooling to Heating Current Detection Threshold ICOOL_HEAT_TH 40 mA TEC VOLTAGE LIMIT Voltage Limit Gain AVLIM (VLDR VSFB)/VVLIM 2 V/V VLIM/SD Input Voltage Range1 VVLIM VVDD/2 V VLIM/SD Input Current Cooling IILIMC VOUT2 < VVREF/2 + A Heating IILIMH VOUT2 > VVREF/2, sinking current 8 10 A TEC CURRENT MEASUREMENT (WLCSP) Current Sense Gain RCS VPVIN = V V/A VPVIN = 5 V V/A Current Measurement Accuracy ILDR_ERROR 700 mA ILDR 1 A, VPVIN = V 10 +10 % 800 mA ILDR 1 A, VPVIN = 5 V 10 +10 % ITEC Voltage Accuracy VITEC_@_700_mA VPVIN = V, cooling, VVREF/2 + ILDR RCS V VITEC_@_ 700_mA VPVIN = V, heating, VVREF/2 ILDR RCS V VITEC_@_800_mA VPVIN = 5 V, cooling, VVREF/2 + ILDR RCS V VITEC_@_ 800_mA VPVIN = 5 V, heating, VVREF/2 ILDR RCS V Data Sheet ADN8833 Rev.

10 B | Page 5 of 23 Parameter Symbol Test Conditions/Comments Min Typ Max Unit TEC CURRENT MEASUREMENT (LFCSP) Current Sense Gain RCS VPVIN = V V/A VPVIN = 5 V V/A Current Measurement Accuracy ILDR_ERROR 700 mA ILDR 1 A, VPVIN = V 15 +15 % 800 mA ILDR 1 A, VPVIN = 5 V 15 +15 % ITEC Voltage Accuracy VITEC_@_700_mA VPVIN = V, cooling, VVREF/2 + ILDR RCS V VITEC_@_ 700_mA VPVIN = V, heating, VVREF/2 ILDR RCS V VITEC_@_800_mA VPVIN = 5 V, cooling, VVREF/2 + ILDR RCS V VITEC_@_ 800_mA VPVIN = 5 V, heating, VVREF/2 ILDR RCS V ITEC Voltage Output Range VITEC ITEC = 0 A 0 VVREF V ITEC Bias Voltage VITEC ILDR = 0 A V Maximum ITEC Output Current IITEC 2 +2 mA TEC VOLTAGE MEASUREMENT Voltage Sense Gain AVTEC V/V Voltage Measurement Accuracy VVTEC_@_1_V VLDR VSFB = 1 V.