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16-Bit, 250 kSPS, Unipolar/Bipolar Programmable …

16-Bit, 250 ksps , Unipolar/Bipolar Programmable input pulsar ADCData Sheet AD7610 Rev. B Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, : 2006 2020 analog devices , Inc. All rights reserved. Technical Support FEATURES Multiple pins/software Programmable input ranges: 5 V, 10 V, 5 V, 10 V Pins or serial SPI -compatible input ranges/mode selection Throughput: 250 ksps 16-bit resolution with no missing codes INL: LSB typ, LSB max ( 23 ppm of FSR) SNR: 94 dB @ 2 kHz iCMOS process technology 5 V internal reference: typical drift 3 ppm/ C On-chip temperature sensor No pipeline delay (SAR architecture) Parallel (16- or 8-bit bus) and serial 5 V interface SPI-/QSPI -/MICROWIRE -/DSP-compatibl

16-Bit, 250 kSPS, Unipolar/Bipolar Programmable Input PulSAR® ADC Data Sheet AD7610 Rev. Document FeedbackA Information furnished by Analog Devices is believed to be accurate and reliable.

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Transcription of 16-Bit, 250 kSPS, Unipolar/Bipolar Programmable …

1 16-Bit, 250 ksps , Unipolar/Bipolar Programmable input pulsar ADCData Sheet AD7610 Rev. B Document Feedback Information furnished by analog devices is believed to be accurate and reliable. However, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of analog devices . Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, : 2006 2020 analog devices , Inc. All rights reserved. Technical Support FEATURES Multiple pins/software Programmable input ranges: 5 V, 10 V, 5 V, 10 V Pins or serial SPI -compatible input ranges/mode selection Throughput: 250 ksps 16-bit resolution with no missing codes INL: LSB typ, LSB max ( 23 ppm of FSR) SNR: 94 dB @ 2 kHz iCMOS process technology 5 V internal reference.

2 Typical drift 3 ppm/ C On-chip temperature sensor No pipeline delay (SAR architecture) Parallel (16- or 8-bit bus) and serial 5 V interface SPI-/QSPI -/MICROWIRE -/DSP-compatible Power dissipation 90 mW @ 250 ksps 10 mW @ 1 ksps 48-lead LQFP and LFCSP (7 mm 7 mm) packages APPLICATIONS Process control Medical instruments High speed data acquisition Digital signal processing Instrumentation Spectrum analysis ATE FUNCTIONAL BLOCK DIAGRAM 16 CLOCKAD7610 DGNDDVDDAVDDAGNDREF REFGNDIN+PDRESETCNVSTPDBUFREFBUFINPDREFR EFTEMPD[15:0]BUSYRDCSOB/2 COGNDOVDDBYTESWAPSER/PARREFAMPSWITCHEDCA P DACVCCVEEBIPOLARTENIN SERIALCONFIGURATIONPORTPARALLELINTERFACE SERIALDATAPORTCONTROL LOGIC ANDCALIBRATION CIRCUITRY06395-001 Figure 1. GENERAL DESCRIPTION The AD7610 is a 16-bit charge redistribution successive approxi-mation register (SAR), architecture analog -to-digital converter (ADC) fabricated on analog devices , Inc.

3 S iCMOS high voltage process. The device is configured through hardware or via a dedicated write only serial configuration port for input range and operating mode. The AD7610 contains a high speed 16-bit sampling ADC, an internal conversion clock, an internal reference (and buffer), error correction circuits, and both serial and parallel system interface ports. A falling edge on CNVST samples the analog input on IN+ with respect to a ground sense, IN . The AD7610 features four different analog input ranges: 0 V to 5 V, 0 V to 10 V, 5 V, and 10 V. Power consumption is scaled linearly with throughput. The device is available in Pb-free 48-lead, low-profile quad flat package (LQFP) and a lead frame chip-scale (LFCSP) package. Operation is specified from 40 C to +85 C. Table 1. 48-Lead 14-/16-/18-Bit pulsar Selection Type 100 ksps to 250 ksps 500 ksps to 570 ksps 800 ksps to 1000 ksps >1000 ksps Pseudo Differential AD7651 AD7660 AD7661 AD7650 AD7652 AD7664 AD7666 AD7653 AD7667 True bipolar AD7610 AD7663 AD7665 AD7612 AD7671 AD7951 True Differential AD7675 AD7676 AD7677 AD7621 AD7622 AD7623 18-Bit, True Differential AD7678 AD7679 AD7674 AD7641 AD7643 Multichannel/ Simultaneous AD7654 AD7655 AD7610 Data Sheet Rev.

4 B | Page 2 of 32 TABLE OF CONTENTS Features .. 1 Applications .. 1 Functional Block Diagram .. 1 General Description .. 1 Revision History .. 2 Specifications .. 3 Timing Specifications .. 5 Absolute Maximum Ratings .. 7 ESD 7 Pin Configuration and Function Descriptions .. 8 Typical Performance Characteristics .. 11 Terminology .. 15 Theory of Operation .. 16 Overview .. 16 Converter Operation .. 16 Transfer Functions .. 17 Typical Connection Diagram .. 18 analog Inputs .. 19 Voltage Reference input /Output .. 20 Power Supplies .. 21 Conversion Control .. 22 Interfaces .. 23 Digital Interface .. 23 Parallel Interface .. 23 Serial Interface .. 24 Master Serial Interface .. 24 Slave Serial Interface .. 26 Hardware Configuration .. 28 Software Configuration .. 28 Microprocessor Interfacing .. 29 Application Information .. 30 Layout Guidelines.

5 30 Evaluating Performance .. 30 Outline Dimensions .. 31 Ordering Guide .. 31 REVISION HISTORY 11/2020 Rev. A to Rev. B Changed CP-48-1 to CP-48-4 .. Throughout Changes to Figure 4 .. 8 Updated Outline Dimensions .. 31 Changes to Ordering Guide .. 31 12/2012 Rev. 0 to Rev. A Added Exposed Pad Note .. 8 Changes to Power Sequencing Section .. 23 Updated Outline Dimensions .. 31 Changes to Ordering Guide .. 31 10/2006 Revision 0: Initial Version Data Sheet AD7610 Rev. B | Page 3 of 32 SPECIFICATIONSAVDD = DVDD = 5 V; OVDD = V to V; VCC = 15 V; VEE = 15 V; VREF = 5 V; all specifications TMIN to TMAX, unless otherwise noted. Table 2. Parameter Conditions/Comments Min Typ Max Unit RESOLUTION 16 Bits

6 analog input Voltage Range, VIN VIN+ VIN = 0 V to 5 V + V VIN+ VIN = 0 V to 10 V + V VIN+ VIN = 5 V + V VIN+ VIN = 10 V + V VIN to AGND + V analog input CMRR fIN = 100 kHz 75 dB input Current VIN = 5 V, 10 V @ 250 ksps 1001 A input Impedance See analog Inputs section THROUGHPUT SPEED Complete Cycle 4 s Throughput Rate 250 ksps DC ACCURACY Integral Linearity Error2 + LSB3 No Missing Codes2

7 16 Bits Differential Linearity Error2 1 + LSB Transition Noise LSB Zero Error ( unipolar or bipolar ) 35 +35 LSB Zero Error Temperature Drift 1 ppm/ C bipolar Full-Scale Error 50 +50 LSB unipolar Full-Scale Error 70 +70 LSB Full-Scale Error Temperature Drift 1 ppm/ C Power Supply Sensitivity AVDD = 5 V 5% 3 LSB AC ACCURACY Dynamic Range VIN = 0 V to 5 V, fIN = 2 kHz, 60 dB dB4 VIN = 0 V to 10 V, 5 V, fIN = 2 kHz, 60 dB 94 dB VIN = 10 V, fIN = 2 kHz, 60 dB dB Signal-to-Noise Ratio VIN = 0 V to 5 V, 0 V to 10 V, fIN = 2 kHz 92 93 dB VIN = 5 V, 10 V, fIN = 2 kHz 94 dB VIN = 0 V to 5 V, fIN = 20 kHz dB Signal-to-(Noise + Distortion) (SINAD)

8 VIN = 5 V, fIN = 2 kHz dB VIN = 0 V to 10 V, 5 V, fIN = 2 kHz 93 dB VIN = 10 V, fIN = 2 kHz dB Total Harmonic Distortion fIN = 2 kHz 107 dB Spurious-Free Dynamic Range fIN = 2 kHz 107 dB 3 dB input Bandwidth VIN = 0 V to 5 V 650 kHz Aperture Delay 2 ns Aperture Jitter 5 ps rms Transient Response Full-scale step 500 ns INTERNAL REFERENCE PDREF = PDBUF = low Output Voltage REF @ 25 C V Temperature Drift 40 C to +85 C 3 ppm/ C Line

9 Regulation AVDD = 5 V 5% 15 ppm/V Long-Term Drift 1000 hours 50 ppm Turn-On Settling Time CREF = 22 F 10 ms REFERENCE BUFFER PDREF = high REFBUFIN input Voltage Range V AD7610 Data Sheet Rev. B | Page 4 of 32 Parameter Conditions/Comments Min Typ Max Unit EXTERNAL REFERENCE PDREF = PDBUF = high Voltage Range REF 5 AVDD + V Current Drain 250 ksps throughput 30 A TEMPERATURE PIN

10 Voltage Output @ 25 C 311 mV Temperature Sensitivity 1 mV/ C Output Resistance k DIGITAL INPUTS Logic Levels VIL + V VIH OVDD +


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