Transcription of 2 A, Low V , Low Dropout Linear Regulator Data …
1 2 A, Low VIN, Low Dropout Linear Regulator Data Sheet ADP1740/ADP1741 FEATURES Maximum output current: 2 A Input voltage range: V to V Low shutdown current: 2 A Low Dropout voltage: 160 mV at 2 A load Initial accuracy: 1% Accuracy over line, load, and temperature: 2% 7 fixed output voltage options with soft start: V to V (ADP1740) Adjustable output voltage options with soft start: V to V (ADP1741) High PSRR 65 dB at 1 kHz 65 dB at 10 kHz 54 dB at 100 kHz 23 V rms at V output Stable with small F ceramic output capacitor Excellent load and line transient response Current-limit and thermal overload protection Power-good indicator Logic-controlled enable Reverse current protection APPLICATIONS Server computers Memory components Telecommunications equipment Network equipment DSP/FPGA/microprocessor supplies Instrumentation equipment/data acquisition systems TYPICAL APPLICATION CIRCUITS TOP VIEW(Not to Scale)ADP17401234 VINVIN100k FVIN = = Figure 1.
2 ADP1740 with Fixed Output Voltage, V TOP VIEW(Not to Scale)ADP17411234 VINVIN100k FVIN = = (1 + R1/R2)VINEN1211109 VOUTVOUTVOUTADJ5678 PGGNDSSNCPG16151413 VINVINVOUTVOUT10nFR2R107081-002 Figure 2. ADP1741 with Adjustable Output Voltage, V to V GENERAL DESCRIPTION The ADP1740/ADP1741 are low Dropout (LDO) CMOS Linear regulators that operate from V to V and provide up to 2 A of output current. These low VIN/VOUT LDOs are ideal for regu-lation of nanometer FPGA geometries operating from V down to V I/O rails, and for powering core voltages down to V. Using an advanced, proprietary architecture, the ADP1740/ ADP1741 provide high power supply rejection ratio (PSRR) and low noise, and achieve excellent line and load transient response with only a small F ceramic output capacitor.
3 The ADP1740 is available in seven fixed output voltage options. The ADP1741 is an adjustable version that allows output voltages ranging from V to V via an external divider. The ADP1740/ADP1741 allow an external soft start capacitor to be connected to program the startup. A digital power-good output allows power system monitors to check the health of the output voltage. The ADP1740/ADP1741 are available in a 16-lead, 4 mm 4 mm LFCSP, making them not only very compact solutions, but also providing excellent thermal performance for applica-tions that require up to 2 A of output current in a small, low profile footprint. Rev. H Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use.
4 Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, Box 9106, Norwood, MA 02062-9106, Tel: 2008 2015 Analog Devices, Inc. All rights reserved. Technical Support ADP1740/ADP1741 Data Sheet TABLE OF CONTENTS Features .. 1 Applications .. 1 Typical Application Circuits .. 1 General Description .. 1 Revision History .. 2 Specifications .. 3 Input and Output Capacitor, Recommended Specifications .. 4 Absolute Maximum Ratings .. 5 Thermal Data .. 5 Thermal Resistance .. 5 ESD Caution .. 5 Pin Configurations and Function Descriptions .. 6 Ty pi ca l Performance Characteristics.
5 7 Theory of Operation .. 11 Soft Start Function .. 11 Adjustable Output Voltage (ADP1741) .. 12 Enable Feature .. 12 Power-Good Feature .. 12 Reverse Current Protection Feature .. 13 Applications Information .. 14 Capacitor Selection .. 14 Undervoltage Lockout .. 15 Current-Limit and Thermal Overload Protection .. 15 Thermal Considerations .. 15 PCB Layout Considerations .. 17 Outline Dimensions .. 19 Ordering Guide .. 19 REVISION HISTORY 1/15 Rev. G to Rev. H Changes to Ordering Guide .. 19 4/14 Rev. F to Rev. G Changes to Figure 1 and Figure 2 .. 1 Changes to Figure 3 and Figure 4 .. 6 Updated Outline Dimensions .. 19 Changes to Ordering Guide .. 19 8/13 Rev. E to Rev. F Changes to Ordering Guide .. 19 6/13 Rev. D to Rev. E Changed Adjustable Output Voltage Option with Soft Start (ADP1755) from V to V to V to V (Throughout).
6 1 Updated Outline Dimensions .. 19 12/12 Rev. C to Rev. D Added Junction Temperature of 150 C, Table 3 .. 5 Changes to Ordering Guide .. 19 9/12 Rev. B to Re v. C Changes to Table 3 .. 5 Changes to Ordering Guide .. 19 2/10 Rev. A to Rev. B Changes to Table 4 .. 5 Changes to Ordering Guide .. 19 4/09 Rev. 0 to Rev. A Changes to Table 3 .. 5 10/08 Revision 0: Initial Version Rev. H | Page 2 of 20 Data Sheet ADP1740/ADP1741 SPECIFICATIONS VIN = (VOUT + V) or V (whichever is greater), IOUT = 100 mA, CIN = COUT = F, TA = 25 C, unless otherwise noted. Table 1. Parameter Symbol Test Conditions/Comments Min Typ Max Unit INPUT VOLTAGE RANGE VIN TJ = 40 C to +125 C V OPERATING SUPPLY CURRENT1 IGND IOUT = 500 A 90 A IOUT = 100 mA 400 A IOUT = 100 mA, TJ = 40 C to +125 C 800 A IOUT = 2 A mA IOUT = 2 A, TJ = 40 C to +125 C mA SHUTDOWN CURRENT IGND-SD EN = GND, VIN = V 2 6 A EN = GND, VIN = V, TJ = 40 C to +85 C 30 A EN = GND, VIN = V, TJ = 40 C to +85 C 100 A OUTPUT VOLTAGE ACCURACY Fixed Output Voltage Accuracy (ADP1740) VOUT IOUT = 100 mA 1 +1 % IOUT = 10 mA to 2 A + % 10 mA < IOUT < 2 A, TJ = 40 C to +125 C 2 +2 % Adjustable Output Voltage Accuracy (ADP1741)
7 2 VADJ IOUT = 100 mA V IOUT = 10 mA to 2 A V 10 mA < IOUT < 2 A, TJ = 40 C to +125 C V LINE REGULATION VOUT/ VIN VIN = (VOUT + V) to V, TJ = 40 C to +125 C + %/V LOAD REGULATION3 VOUT/ IOUT IOUT = 10 mA to 2 A, TJ = 40 C to +125 C %/A Dropout VOLTAGE4 VDROPOUT IOUT = 100 mA, VOUT V 10 mV IOUT = 100 mA, VOUT V, TJ = 40 C to +125 C 18 mV IOUT = 2 A, VOUT V 160 mV IOUT = 2 A, VOUT V, TJ = 40 C to +125 C 280 mV S TA R T-UP TIME5 tS TART-UP CSS = 0 n F, IOUT = 10 mA 200 s CSS = 10 n F, IOUT = 10 mA ms CURRENT-LIMIT THRESHOLD6 ILIMIT 3 5 A THERMAL SHUTDOWN Thermal Shutdown Threshold TSSD TJ rising 150 C Thermal Shutdown Hysteresis TSSD-HYS 15 C PG OUTPUT LOGIC LEVEL PG Output Logic High PGHIGH V VIN V, IOH < 1 A V PG Output Logic Low PGLOW V VIN V, IOL < 2 mA V PG Output Delay from EN Transition.
8 Low to High V VIN V, CSS = 10 nF ms PG OUTPUT THRESHOLD Output Voltage Falling PGFA L L V VIN V 10 % Output Voltage Rising PGRISE V VIN V % EN INPUT EN Input Logic High VIH V VIN V V EN Input Logic Low VIL V VIN V V EN Input Leakage Current VI- LEAKAGE EN = VIN or GND 1 A UNDERVOLTAGE LOCKOUT UVLO Input Voltage Rising UVLORISE V Input Voltage Falling UVLOFALL V Hysteresis UVLOHYS 100 mV SOFT START CURRENT ISS V VIN V A ADJ INPUT BIAS CURRENT (ADP1741) ADJI- BIAS V VIN V, TJ = 40 C to +125 C 10 150 nA Rev. H | Page 3 of 20 ADP1740/ADP1741 Data Sheet Parameter Symbol Test Conditions/Comments Min Typ Max Unit SENSE INPUT BIAS CURRENT (ADP1740) SNSI- BIAS V VIN V 10 A OUTPUT NOISE OUTNOISE 10 Hz to 100 kHz, VOUT = V 23 V rms 10 Hz to 100 kHz, VOUT = V 65 V rms POWER SUPPLY REJECTION RATIO PSRR VIN = VOUT + 1 V, IOUT = 10 mA 1 kHz, VOUT = V 65 dB 1 kHz, VOUT = V 56 dB 10 kHz, VOUT = V 65 dB 10 kHz, VOUT = V 56 dB 100 kHz, VOUT = V 54 dB 100 kHz, VOUT = V 51 dB 1 Minimum output load current is 500 A.
9 2 Accuracy when VOUT is connected directly to ADJ. When VOUT voltage is set by external feedback resistors, absolute accuracy in adjust mode depends on the tolerances of the resistors used. 3 Based on an endpoint calculation using 10 mA and 2 A loads. See Figure 6 for typical load regulation performance. 4 Dropout voltage is defined as the input to output voltage differential when the input voltage is set to the nominal output voltage. This applies only to output voltages above V. 5 Start-up time is defined as the time between the rising edge of EN to VOUT being at 95% of its nominal value. 6 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a V output voltage is defined as the current that causes the output voltage to drop to 90% of V, or V.
10 INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS Table 2. Parameter Symbol Test Conditions/Comments Min Typ Max Unit MINIMUM INPUT AND OUTPUT CAPACITANCE1 CMIN TA = 40 C to +125 C F CAPACITOR ESR RESR TA = 40 C to +125 C 1 The minimum input and output capacitance should be greater than F over the full range of operating conditions. The full range of operating conditions in the application must be considered during capacitor selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended; Y5V and Z5U capacitors are not recommended for use with this LDO. Rev. H | Page 4 of 20 Data Sheet ADP1740/ADP1741 ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating VIN to GND V to + V VOUT to GND V to VIN EN to GND V to VIN SS to GND V to VIN PG to GND V to + V SENSE/ADJ to GND V to VIN Storage Temperature Range 65 C to +150 C Junction Temperature Range 40 C to +125 C Junction Temperature 150 C Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product.
