a Logarithmic Amplifier with Limiter Output 5 …

1 REV. BInformation furnished by Analog Devices is believed to be accurate andreliable. However, no responsibility is assumed by Analog Devices for itsuse, nor for any infringements of patents or other rights of third partieswhich may result from its use. No license is granted by implication orotherwise under any patent or patent rights of Analog Technology Way, Box 9106, Norwood, MA 02062-9106, : 781/329-4700 World Wide Web Site: : 781/326-8703 Analog Devices, Inc., 19995 MHz 500 MHz 100 dB DemodulatingLogarithmic Amplifier with Limiter OutputFUNCTIONAL BLOCK DIAGRAM12dBLIMDET12dBDETDET4 3 DETLADR ATTENINHIINLOI-VBIASCTRLTEN DETECTORS SPACED 12dBINTERCEPTTEMP COMPBAND-GAPREFERENCEENBLGAINBIASLMHILML OLMDRVLOGFLTRSIX STAGES TOTAL GAIN 72dBTYP GAIN 18dBSLOPEBIAS12dBFEATURESC omplete Multistage Log-Limiting IF Amplifier100 dB Dynamic Range: 78 dBm to +22 dBm (Re 50 V)Stable RSSI Scaling Over Temperature and Supplies.

2 20 mV/dB Slope, 95 dBm dB RSSI Linearity up to 200 MHzProgrammable Limiter Gain and Output CurrentDifferential Outputs to 10 mA, V p-pOverall Gain 100 dB, Bandwidth 500 MHzConstant Phase (Typical 680 ps Delay Skew)Single Supply of + V to + V at 16 mA TypicalFully Differential Inputs, RIN = 1 kV, CIN = pF500 ns Power-Up Time, <1 mA Sleep CurrentAPPLICATIONSR eceivers for Frequency and Phase ModulationVery Wide Range IF and RF Power MeasurementReceiver Signal Strength Indication (RSSI)Low Cost Radar and Sonar Signal ProcessingInstrumentation: Network and Spectrum AnalyzersPRODUCT DESCRIPTIONThe AD8309 is a complete IF limiting Amplifier , providing bothan accurate Logarithmic (decibel) measure of the input signal(the RSSI function) over a dynamic range of 100 dB, and aprogrammable Limiter Output , useful from 5 MHz to 500 is easy to use, requiring few external components.

3 A singlesupply voltage of + V to + V at 16 mA is needed, corre-sponding to a power consumption of under 50 mW at 3 V, plusthe Limiter bias current, determined by the application andtypically 2 mA, providing a Limiter gain of 100 dB when using200 loads. A CMOS-compatible control interface can enablethe AD8309 within about 500 ns and disable it to a standbycurrent of under 1 six cascaded Amplifier / Limiter cells in the main path have asmall signal gain of dB ( 4), with a 3 dB bandwidth of850 MHz, providing a total gain of 72 dB.

4 The programmableoutput stage provides a further 18 dB of gain. The input is fullydifferential and presents a moderately high impedance (1 k inparallel with pF). The input-referred noise-spectral-density,when driven from a terminated 50 , source is nV/ Hz,equivalent to a noise figure of 3 dB. The sensitivity of theAD8309 can be raised by using an input matching of the main gain cells includes a full-wave detector. Anadditional four detectors, driven by a broadband attenuator, areused to extend the top end of the dynamic range by over 48 overall dynamic range for this combination extends from 91 dBV ( 78 dBm at the 50 level) to a maximum permissiblevalue of +9 dBV, using a balanced drive of antiphase inputs eachof 2 V in amplitude, which would correspond to a sine wavepower of +22 dBm if the differential input were terminated in50.

5 The slope of the RSSI Output is closely controlled to20 mV/dB, while the intercept is set to 108 dBV ( 95 dBmre 50 ). These scaling parameters are determined by a band-gap voltage reference and are substantially independent of tem-perature and supply. The Logarithmic law conformance is typicallywithin dB over the central 80 dB of this range at any fre-quency between 10 MHz and 200 MHz, and is degraded onlyslightly at 500 RSSI response time is nominally 67 ns (10% 90%). Theaveraging time may be increased without limit by the addition ofan external capacitor.

6 The full Output of V at the maximuminput of +9 dBV can drive any resistive load down to 50 andthis interface remains stable with any value of capacitance onthe AD8309 is fabricated on an advanced complementarybipolar process using silicon-on-insulator isolation techniquesand is available in the industrial temperature range of 40 C to+85 C, in a 16-lead TSSOP B 2 AD8309 SPECIFICATIONSP arameterConditionsMin1 TypMax1 UnitsINPUT STAGE(Inputs INHI, INLO)Maximum Input2 Differential drive , p-p 4V+9dBVEquivalent Power in 50 Terminated in +22dBmNoise FloorTerminated 50 HzEquivalent Power in 50 500 MHz Bandwidth 78dBmInput ResistanceFrom INHI to INLO80010001200 Input CapacitanceFrom INHI to Bias VoltageEither Amplifier (Outputs LMHI, LMLO)

7 Usable Frequency Range5500 MHzAt Limiter OutputRLOAD = RLIM = 50 to 10 dB Point875 MHzPhase Variation at 100 MHzOver Input Range 60 dBm to +10 dBm 3 DegreesLimiter Output CurrentNominally 400 mV/RLIM0110mAVersus Temperature 40 C TA +85 C CInput Range3 78+9dBVEquivalent dBm 65+22dBmMaximum Output VoltageAt Either LMHI or LMLO, wrt Time (10% 90%)RLOAD 50 , 40 RLIM 400 Amplifier ( Output VLOG) 3 dB Error Dynamic RangeFrom Noise Floor to Maximum Input100dBTransfer Slope5 MHz f 200 MHz182022mV/dBOver Temperature 40 C < TA < +85 C172023mV/dBIntercept (Log Offset)5 MHz f 200 MHz 116 108 100dBVEquivalent dBm (re 50 ) 103 95 87dBmOver Temperature 40 C TA +85 C 117 108 99dBVEquivalent dBm (re 50 ) 104 95 86dBmTemperature Sensitivity CLinearity Error (Ripple)Input from 83 dBV ( 70 dBm) to +7 dBV (+20 dBm) VoltageInput = 91 dBV ( 78 dBm) VS = +5 V, + = +9 dBV (+22 dBm)

8 VS = +5 = +9 dBV (+22 dBm) VS = + Load Resistance, RL4050 Maximum Sink CurrentTo Small-Signal Settling Time to 1%Large Scale Input, +3 dBV (+16 dBm),RL 50 , CL 100 pF120220nsRise/Fall Time (10% 90%)Large Scale Input, +3 dBV (+16 dBm),RL 50 , CL 100 pF67100nsPOWER INTERFACESS upply Voltage, CurrentZero-Signal, LMDR Open131620mAOver Temperature 40 C < TA < +85 C111623mADisable Current 40 C < TA < +85 AAdditional Bias for LimiterRLIM = 400 (See Text) Level to Enable PowerHI Condition, 40 C < TA < +85 Current when HI3 V at ENBL, 40 C < TA < +85 C4060 ALogic Level to Disable PowerLO Condition, 40 C < TA < +85 C and maximum specified limits on parameters that are guaranteed but not tested are six sigma input level is specified in dBV since Logarithmic amplifiers respond strictly to voltage, not power.

9 0 dBV corresponds to a sinusoidal single-frequency input of1 V rms. A power level of 0 dBm (1 mW) in a 50 termination corresponds to an input of V rms. Hence, the relationship between dBV and dBm is a fixedoffset of +13 dBm in the special case of a 50 to the extremely high Gain Bandwidth Product of the AD8309, the Output of either LMHI or LMLO will be unstable for levels below 78 dBV ( 65 dBm, re 50 ).Specifications subject to change without notice.(VS = +5 V, TA = +258C, unless otherwise noted)REV.

10 BAD8309 3 ABSOLUTE MAXIMUM RATINGS*Supply Voltage VS .. VInput Level, Differential (re 50 ) .. +26 dBmInput Level, Single-Ended (re 50 ) .. +20 dBmInternal Power Dissipation .. 500 mW JA .. 150 C/W JC .. C/WMaximum Junction Temperature .. +125 CCAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readilyaccumulate on the human body and test equipment and can discharge without the AD8309 features proprietary ESD protection circuitry, permanent damage mayoccur on devices subjected to high energy electrostatic discharges.