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Bluetooth® low energy wireless system-on-chip

Features Bluetooth low energy single mode system-on-chip compliant with Bluetoothspecifications: master, slave and multiple simultaneous roles Operating supply voltage: from to V Integrated linear regulator and DC-DC step-down converter Operating temperature range: -40 C to 105 C High performance, ultra-low power Cortex-M0 32-bit based architecture core Programmable 160 kB Flash 24 kB RAM with retention (two 12 kB banks) 1 x UART interface 1 x SPI interface 2 x I C interface 14 or 15 GPIOs 2 x multifunction timer 10-bit ADC Watchdog and RTC DMA controller PDM stream processor 16 or 32 MHz crystal oscillator 32 kHz crystal oscillator 32 kHz ring oscillator Battery voltage and temperature sensors Up to +8 dBm available output power (at antenna connector) Excellent RF link budget (up to 96 dB) Accurate RSSI to allow power control mA TX current (@ -2 dBm, V) Down to 1 A current consumption with active BLE stack (sleep mode) ST companion integrated balun/filter chips are available Average advertisement current consumption A (advertisement interval1000 ms) 1 year, 8 months, 19 days with 230 mAh battery (CR2032)

The BlueNRG-1 most efficient power management configuration is with DC-DC converter active where best power consumption is obtained without compromising performances.

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Transcription of Bluetooth® low energy wireless system-on-chip

1 Features Bluetooth low energy single mode system-on-chip compliant with Bluetoothspecifications: master, slave and multiple simultaneous roles Operating supply voltage: from to V Integrated linear regulator and DC-DC step-down converter Operating temperature range: -40 C to 105 C High performance, ultra-low power Cortex-M0 32-bit based architecture core Programmable 160 kB Flash 24 kB RAM with retention (two 12 kB banks) 1 x UART interface 1 x SPI interface 2 x I C interface 14 or 15 GPIOs 2 x multifunction timer 10-bit ADC Watchdog and RTC DMA controller PDM stream processor 16 or 32 MHz crystal oscillator 32 kHz crystal oscillator 32 kHz ring oscillator Battery voltage and temperature sensors Up to +8 dBm available output power (at antenna connector) Excellent RF link budget (up to 96 dB) Accurate RSSI to allow power control mA TX current (@ -2 dBm, V) Down to 1 A current consumption with active BLE stack (sleep mode) ST companion integrated balun/filter chips are available Average advertisement current consumption A (advertisement interval1000 ms) 1 year, 8 months, 19 days with 230 mAh battery (CR2032)

2 Average connection current consumption A (connection interval 1000ms) 3 years, 10 months, 12 days with 230 mAh battery (CR2032) Suitable for building applications compliant with the following radio frequencyregulations: ETSI EN 300 328, EN 300 440, FCC CFR47 part 15, ARIB STD-T66 Pre-programmed bootloader via UART QFN32 and WCSP34 package optionsApplications Watches Fitness, wellness and sportsProduct status linkBlueNRG-1 Bluetooth low energy wireless system-on-chipBlueNRG-1 DatasheetDS11481 - Rev 6 - July 2018 For further information contact your local STMicroelectronics sales Consumer medical Security/proximity Remote control Home and industrial automation Assisted living Mobile phone peripherals Lighting PC peripheralsBlueNRG-1DS11481 - Rev 6page 2/1671 DescriptionThe BlueNRG-1 is a very low power Bluetooth low energy (BLE) single-mode system-on-chip , compliant withBluetooth BlueNRG-1 extends the features of award-winning BlueNRG network processor, enabling the usage of theembedded Cortex M0 to run the user application BlueNRG-1 includes 160 kB of programming Flash memory, 24 kB of static RAM memory with retention (two12 kB banks) and SPI, UART, I C standard communication interface peripherals.

3 It also features multifunctiontimers, watchdog, RTC and DMA ADC is available to interface with analog sensors, and to read the measurement of the integrated batteryvoltage sensor. A digital filter is available to process a PDM BlueNRG-1 offers the same excellent RF performance of the BlueNRG radio, and the integrated highefficiency DC-DC converter keeps the same ultra-low power characteristics, but the BlueNRG-1 improves theBlueNRG sleep mode current consumption allowing a further increase in the battery lifetime of the 1. BlueNRG-1 architectureRF AFELDOsRcosc XoscModulationDemodulationBlueCortex-M0 DMAAHB Bus matrix3x Masters7x SlavesFlash Controller12 kB SRAM Switchable12 kB SRAM always OnAHB2 APB bridgePKA4 kB SRAMRNG160 kB Flash Array14 or 15 x GPIOsSPIUART2x I2C2x MFTW atchdogRTCCRMU(Clock and Reset Management Unit)ADC IFAUX ADCBlueNRG-1 Description DS11481 - Rev 6page 3/167 Figure 2. BlueNRG-1 bus architectureAPBAHBAHB-APB BridgeSPI2 x I2 CUART2 x MFTWDGRTCGPIOsCM0 FLASH (160 kB)RAM(24 kB) GHzradioRNGADCSWDPKABlueNRG-1 Description DS11481 - Rev 6page 4/1672 BlueNRG-1 Bluetooth low energy stackThe BlueNRG-1 is complemented with a Bluetooth low energy stack C library that provides: Master, slave role support GAP: central, peripheral, observer or broadcaster roles ATT/GATT: client and server SM: privacy, authentication and authorization L2 CAP Link layer: AES-128 encryption and decryptionThe BlueNRG-1 can be configured to support single chip or network processor the first configuration, the BlueNRG-1 operates as single device in the application for managing both theapplication code and the Bluetooth low energy stack.

4 The whole Bluetooth low energy stack is provided as objectcode in a single library file whereas the GATT low energy profiles are provided as object codes in figure below shows the single chip RF software 3. BlueNRG-1 single-chip RF software layersThe BlueNRG-1 can be configured to operate as a network coprocessor. In this case, dedicated firmware isprovided to support the interface with an external application processor. The whole Bluetooth low energy stackruns in the BlueNRG-1; the GATT profiles are provided to run in the application processor together with theapplication code. The figure below shows the network processor RF software Bluetooth low energy stack DS11481 - Rev 6page 5/167 Figure 4. BlueNRG-1 network processor RF software layersBlueNRG-1 BlueNRG-1 Bluetooth low energy stack DS11481 - Rev 6page 6/1673 Functional detailsThe BlueNRG-1 integrates: ARM Cortex-M0 core Interrupts management 160 kB Flash memory 24 kB of RAM with two retention options (12 kB or 24 kB) power management Clocks Bluetooth low energy radio Random number generator (RNG) (reserved for Bluetooth low energy protocol stack, but user applicationscan read it) Public key cryptography (PKA) (reserved for Bluetooth low energy protocol stack) Peripherals.

5 SPI interface UART interface I C bus interface GPIO Multifunction timer DMA controller Watchdog RTC ADC with battery voltage sensor and temperature sensor PDM stream ARM Cortex -M0 processor has been developed to provide a low-cost platform that meets the needs ofMCU implementation, with a reduced pin count and low- power consumption, while delivering outstandingcomputational performance and an advanced system response to ARM Cortex -M0 32-bit RISC processor features exceptional code-efficiency, delivering the high-performance expected from an ARM core in the memory size usually associated with 8-bit and 16-bit BlueNRG-1 has an embedded ARM core and is therefore compatible with all ARM tools and Cortex-M0 nested vector interrupt controller (NVIC) handles interrupts. The NVIC controls specific Cortex-M0interrupts (address 0x00 to 0x3C) as well as 32-user interrupts (address 0x40 to 0xBC). In the BlueNRG-1 device,the user interrupts are connected to the interrupt signals of the different 1.

6 BlueNRG-1 interrupt vectorsPositionPriorityPriority typeDescriptionAddressInitial main SP0x0000_0000-3 FixedReset handler0x0000_0004-2 FixedNMI handler0x0000_0008-1 FixedHardFault handler0x0000_000 CRESERVED0x0000_000C 0x0000_0028 BlueNRG-1 Functional details DS11481 - Rev 6page 7/167 PositionPriorityPriority typeDescriptionAddress3 SettableSVC handler0x0000_002 CRESERVED0x0000_0030 - 0x0000_00345 SettablePendSV handler0x0000_00386 SettableSystemTick handler0x0000_003C0 Init 0 SettableGPIO interrupt0x0000_00401 Init 0 SettableFLASH controller interrupt0x0000_00442 Init 0 SettableRESERVED0x0000_00483 Init 0 SettableRESERVED0x0000_004C4 Init 0 SettableUART interrupt0x0000_00505 Init 0 SettableSPI interrupt0x0000_00546 Init 0 CRITICALBLE controller interrupt0x0000_00587 Init 0 SettableWatchdog interrupt0x0000_005C8 Init 0 SettableRESERVED0x0000_00609 Init 0 SettableRESERVED0x0000_006410 Init 0 SettableRESERVED0x0000_006811 Init 0 SettableRESERVED0x0000_006C12 Init 0 SettableRESERVED0x0000_007013 Init 0 SettableADC interrupt0x0000_007414 Init 0 SettableI2C 2 interrupt0x0000_007815 Init 0 SettableI2C 1 interrupt0x0000_007C16 Init 0 SettableRESERVED0x0000_008017 Init 0 SettableMFT1 A interrupt0x0000_008418 Init 0 SettableMFT1 B interrupt0x0000_008819 Init 0 SettableMFT2 A interrupt0x0000_008C20 Init 0 SettableMFT2 B interrupt0x0000_009021 Init 0 SettableRTC interrupt0x0000_009422 Init 0 SettablePKA interrupt0x0000_009823 Init 0 SettableDMA interrupt0x0000_009C24 31 Init 0 SettableRESERVED0x0000_00A0 memory subsystem consists 160 kB Flash memory and two banks of 12 kB ultra-low leakage static 160 kB Flash memory is available to the user and can be accessed per 32-bit for read access and per 32-bitfor write access (with 4x32-bit FIFO).

7 The access to the static RAM can be bytes, half words (16 bits) or words (32 bits).A 12 kB RAM block is always in retention mode, whereas the second 12 kB RAM block is switchable and can beput in retention mode according to the user managementThe BlueNRG-1 integrates both a low dropout voltage regulator (LDO) and a step-down DC-DC converter tosupply the internal BlueNRG-1 DS11481 - Rev 6page 8/167 The BlueNRG-1 most efficient power management configuration is with DC-DC converter active where bestpower consumption is obtained without compromising performances. Nevertheless, a configuration based on LDOcan also be used, if simplified version of the state machine is shown 5. BlueNRG-1 power management state stateThe preactive state is the default state after a POR this state: All the digital power supplies are stable. The high frequency clock runs on internal fast clock RC oscillator (16 MHz). The low frequency clock runs on internal RC oscillator ( kHz).

8 StateIn this state: The high frequency runs on the accurate clock (16 MHz 50 ppm) provided by the external XO. The internalfast clock RO oscillator is switched :If the external XO is at 32 MHz, some specific programming are needed, see Switching to external stateIn this state: Only the digital power supplies necessary to keep the RAM in retention are wake-up from this low power state is driven by the following sources: IO9 IO10 IO11 IO12 IO13(1) 1. Not available on WCSP34. If they have been programmed as wake-up source in the system controller management DS11481 - Rev 6page 9 stateIn this state: Only the digital power supplies necessary to keep the RAM in retention are used. The low frequency oscillator is switched wake-up from this low power state is driven by the following sources: IO9 IO10 IO11 IO12 IO13 (1) 1. Not available on WCSP34. If they have been programmed as wake-up source in the system controller registers and from the internal timersof the BLE wake-up sourcesThe IOs programmed to be wake-up sources need an external drive according to the selected level the wake-up level is high level, a pull-down drive should be used.

9 If the wake-up level is low level, a pull-updrive should be no external drive is applied, IO9, IO10 and IO11 are only sensitive to low level as they have an internal pull-up(activated by default). IO12 and IO13 do not have an internal pull and therefore require an external timeThe wake-up time is typically 200 s at V and a temperature of 25 saving strategyThe application power saving strategy is based on clock stopping, dynamic clock gating,digital power supply switch off and analog current consumption summary of functional blocks versus the BlueNRG-1 states is provided 2. Relationship between the BlueNRG-1 states and functional blocksFunctional blocksRESETSTANDBYSLEEPP reactiveActiveLOCK RX/LOCK TXRXTXLDO_SOFT_1V2 orLDO_SOFT_0V9 OFFONONONONONONONLDO_STRONG_1V2 OFFOFFOFFONONONONONLDO_DIG_1V8 OFFOFFOFFONONONONONSMPSOFFOFFOFFONONONON ONLDO_DIG_1V2 OFFOFFOFFONONONONONBOROFFONONONONONONON1 6 MHz ROOFFOFFOFFONOFFOFFOFFOFF16 MHz XOOFFOFFOFFOFFONONONON32 kHz RO or controller registersSYSTEM_CTRL peripheral base address (SYSTEM_CTRL_BASE_ADDR) management DS11481 - Rev 6page 10/167 Table 3.

10 SYSTEM_CTRL registersAddress offsetNameRWResetDescription0x00 WKP_IO_ISRW0x00000000 Level selection for wake-up IO (1 bit for IO).0: The system wakes up when IO is : The system wakes up when IO is the IO that wakes up the device (1 bit forIO).0: The wake-up feature on the IO is : The wake-up feature on the IO is frequency indication is provided by theapplication. Refer to the detailed description 4. SYSTEM_CTRL - WKP_IO_IS register description: address offset SYSTEM_CTRL_BASE_ADDR+0x00 BitField nameResetRWDescription4:0 LEVEL_SEL0x00 RWSelects the active wake-up level for the five :The system wakes up when IO is : The system wakes up when IO is bit by IO:Bit0: IO9 Bit1: IO10 Bit2: IO11 Bit3: IO12 Bit4: IO1331:5 RESERVED0x00 RWRESERVEDT able 5. SYSTEM_CTRL - WKP_IO_IE register description: address offset SYSTEM_CTRL_BASE_ADDR+0x04 BitField nameResetRWDescription4:0IO_WAKEUP_EN0x0 7 RWEnables the IOs to be wake-up : Wake-up on the IO : Wake-up on the IO bit by IO:Bit0: IO9 Bit1: IO10 Bit2: IO11 Bit3: IO12 Bit4: IO1331:5 RESERVED0x00 RWRESERVEDBlueNRG-1 power management DS11481 - Rev 6page 11/167 Table 6.


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