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CMOS Transistor Theory - pages.hmc.edu

Lecture 3: cmos Transistor Theory3: cmos Transistor Theory2 cmos vlsi DesignCMOS vlsi Design 4th Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V Characteristics Gate and Diffusion Capacitance3: cmos Transistor Theory3 cmos vlsi DesignCMOS vlsi Design 4th So far, we have treated transistors as ideal switches An ON Transistor passes a finite amount of current Depends on terminal voltages Derive current-voltage (I-V) relationships Transistor gate, source, drain all have capacitance I = C ( V/ t) -> t = (C/I) V Capacitance and current determine speed3: cmos Transistor Theory4 cmos vlsi DesignCMOS vlsi Design 4th gate(a)silicon dioxide insulatorp-type body+-Vg< 0 MOS Capacitor Gate and body form MOS capacitor Operating modes Accumulation Depletion Inversion3: cmos Transistor Theory5 cmos vlsi DesignCMOS vlsi Design 4th Voltages Mode of operation depends on Vg, Vd, Vs Vgs= Vg Vs Vgd= Vg Vd Vds= Vd Vs= Vgs-Vgd Sourc

3: CMOS Transistor Theory 3CMOS VLSI DesignCMOS VLSI Design 4th Ed. Introduction So far, we have treated transistors as ideal switches An ON transistor passes a finite amount of current

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Transcription of CMOS Transistor Theory - pages.hmc.edu

1 Lecture 3: cmos Transistor Theory3: cmos Transistor Theory2 cmos vlsi DesignCMOS vlsi Design 4th Introduction MOS Capacitor nMOS I-V Characteristics pMOS I-V Characteristics Gate and Diffusion Capacitance3: cmos Transistor Theory3 cmos vlsi DesignCMOS vlsi Design 4th So far, we have treated transistors as ideal switches An ON Transistor passes a finite amount of current Depends on terminal voltages Derive current-voltage (I-V) relationships Transistor gate, source, drain all have capacitance I = C ( V/ t) -> t = (C/I) V Capacitance and current determine speed3: cmos Transistor Theory4 cmos vlsi DesignCMOS vlsi Design 4th gate(a)silicon dioxide insulatorp-type body+-Vg< 0 MOS Capacitor Gate and body form MOS capacitor Operating modes Accumulation Depletion Inversion3: cmos Transistor Theory5 cmos vlsi DesignCMOS vlsi Design 4th Voltages Mode of operation depends on Vg, Vd, Vs Vgs= Vg Vs Vgd= Vg Vd Vds= Vd Vs= Vgs-Vgd Source and drain are symmetric diffusion terminals By convention, source is terminal at lower voltage Hence Vds 0 nMOS body is grounded.

2 First assume source is 0 too. Three regions of operation Cutoff Linear SaturationVgVsVdVgdVgsVds+-+-+-3: cmos Transistor Theory6 cmos vlsi DesignCMOS vlsi Design 4th Cutoff No channel Ids 0+-Vgs = 0n+n++-Vgdp-type bodybgsd3: cmos Transistor Theory7 cmos vlsi DesignCMOS vlsi Design 4th Linear Channel forms Current flows from d to s e-from s to d Idsincreases with Vds Similar to linear resistor+-Vgs > Vtn+n++-Vgd = Vgs+-Vgs > Vtn+n++-Vgs > Vgd > VtVds = 00 < Vds < Vgs-Vtp-type bodyp-type bodybgsdbgsdIds3: cmos Transistor Theory8 cmos vlsi DesignCMOS vlsi Design 4th Saturation Channel pinches off Idsindependent of Vds We say current saturates Similar to current source+-Vgs > Vtn+n++-Vgd < VtVds > Vgs-Vtp-type bodybgsdIds3: cmos Transistor Theory9 cmos vlsi DesignCMOS vlsi Design 4th Characteristics In Linear region, Idsdepends on How much charge is in the channel?

3 How fast is the charge moving?3: cmos Transistor Theory10 cmos vlsi DesignCMOS vlsi Design 4th Charge MOS structure looks like parallel plate capacitor while operating in inversions Gate oxide channel Qchannel= CV C = Cg= oxWL/tox= CoxWL V = Vgc Vt= (Vgs Vds/2) Vtn+n+p-type body+Vgdgate++source-Vgs-drainVdschannel -VgVsVdCgn+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = )polysilicongateCox= ox/ tox3: cmos Transistor Theory11 cmos vlsi DesignCMOS vlsi Design 4th velocity Charge is carried by e- Electrons are propelled by the lateral electric field between source and drain E = Vds/L Carrier velocity vproportional to lateral E-field v= E called mobility Time for carrier to cross channel: t= L / v3: cmos Transistor Theory12 cmos vlsi DesignCMOS vlsi Design 4th Linear I-V Now we know How much charge Qchannelis in the channel How much time teach carrier takes to crosschannelox22dsdsgstdsdsgstdsQItWVCVV VLVVVV = = = ox = WCL 3.

4 cmos Transistor Theory13 cmos vlsi DesignCMOS vlsi Design 4th Saturation I-V If Vgd< Vt, channel pinches off near drain When Vds> Vdsat= Vgs Vt Now drain voltage no longer increases current()222dsatdsgstdsatgstVIVVVVV = = 3: cmos Transistor Theory14 cmos vlsi DesignCMOS vlsi Design 4th I-V Summary()2cutofflinearsaturatio022ngstds dsgstdsdsdsatgstdsdsatVVVIVV VVVVVVV < = < > Shockley1storder Transistor models3: cmos Transistor Theory15 cmos vlsi DesignCMOS vlsi Design 4th We will be using a m process for your project From AMI Semiconductor tox= 100 = 350 cm2/V*s Vt= V Plot Idsvs. Vds Vgs= 0, 1, 2, 3, 4, 5 Use W/L = 4/2 () 10350120 A/V100 10oxWWWCLLL === (mA)Vgs = 5 Vgs = 4 Vgs = 3 Vgs = 2 Vgs = 13: cmos Transistor Theory16 cmos vlsi DesignCMOS vlsi Design 4th I-V All dopings and voltages are inverted for pMOS Source is the more positive terminal Mobility pis determined by holes Typically 2-3x lower than that of electrons n 120 cm2/V s in AMI m process Thus pMOS must be wider to provide same current In this class, assume n/ p= (mA)Vgs = -5 Vgs = -4 Vgs = -3 Vgs = -2 Vgs = -1 Vds3.

5 cmos Transistor Theory17 cmos vlsi DesignCMOS vlsi Design 4th Any two conductors separated by an insulator have capacitance Gate to channel capacitor is very important Creates channel charge necessary for operation Source and drain have capacitance to body Across reverse-biased diodes Called diffusion capacitance because it is associated with source/drain diffusion3: cmos Transistor Theory18 cmos vlsi DesignCMOS vlsi Design 4th Capacitance Approximate channel as connected to source Cgs= oxWL/tox= CoxWL = CpermicronW Cpermicronis typically about 2 fF/ m n+n+p-type bodyWLtoxSiO2 gate oxide(good insulator, ox = 0)polysilicongate3: cmos Transistor Theory19 cmos vlsi DesignCMOS vlsi Design 4th Capacitance Csb, Cdb Undesirable, called parasiticcapacitance Capacitance depends on area and perimeter Use small diffusion nodes Comparable to Cgfor contacted diff Cgfor uncontacted Varies with process


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