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1 DatasheetPRELIMINARY SPECIFICATION1/4" color CMOS QSXGA (5 megapixel) image sensorwith OmniBSI technologyOV5647 SPECIFICATION proprietary to OmniVision Technologiesi00 Copyright 2009 OmniVision Technologies, Inc. All rights document is provided as is with no warranties whatsoever, including any warranty of merchantability, non-infringement, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification, or Technologies, Inc. and all its affiliates disclaim all liability, including liability for infringement of any proprietary rights, relating to the use of information in this document. No license, expressed or implied, by estoppel or otherwise, to any intellectual property rights is granted information contained in this document is considered proprietary to OmniVision Technologies, Inc.

2 And all its affiliates. This information may be distributed to individuals or organizations authorized by OmniVision Technologies, Inc. to receive said information. Individuals and/or organizations are not allowed to re-distribute said InformationOmniVision and the OmniVision logo are registered trademarks of OmniVision Technologies, Inc. OmniBSI is a trademark of OmniVision Technologies, other trademarks used herein are the property of their respective learn more about OmniVision Technologies, visit OmniVision Technologies is publicly traded on NASDAQ under the symbol CMOS QSXGA (5 megapixel) image sensor with OmniBSI technologydatasheet (COB) PRELIMINARY SPECIFICATION version november 2009 color CMOS QSXGA (5 megapixel) image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version PRELIMINARY SPECIFICATION proprietary to OmniVision Technologiesiiiordering information OV05647-G04A (color, chip probing, 200 m backgrinding, reconstructed wafer)

3 00applications cellular phones toys PC multimedia digital still cameras00features m x m pixel with OmniBSI technology for high performance (high sensitivity, low crosstalk, low noise) optical size of 1/4" automatic image control functions: automatic exposure control (AEC), automatic white balance (AWB), automatic band filter (ABF), automatic 50/60 Hz luminance detection , and automatic black level calibration (ABLC) programmable controls for frame rate, AEC/AGC 16-zone size/position/weight control, mirror and flip, cropping, windowing, and panning image quality controls: lens correction , defective pixel canceling support for output formats: 8-/10-bit raw RGB data support for video or snapshot operations support for LED and flash strobe mode support for internal and external frame synchronization for frame exposure mode support for horizontal and vertical sub-sampling standard serial SCCB interface digital video port (DVP) parallel output interface MIPI interface (two lanes) 32 bytes of embedded one-time programmable (OTP) memory on-chip phase lock loop (PLL) embedded regulator for core power programmable I/O drive capability, I/O tri-state configurability support for black sun cancellation 00key specifications active array size: 2592 x 1944 power supply: core: + 5% (with embedded regulator)analog: ~ ( typical)I/O: ~ power requirements: active: TBDstandby: TBD temperature range: operating: -30 C to 70 C (see table 8-2)stable image: 0 C to 50 C (see table 8-2) output formats.

4 8-/10-bit RGB RAW output lens size: 1/4" lens chief ray angle: 24 (see figure 10-2) input clock frequency: 6~27 MHz S/N ratio: TBD dynamic range: TBD maximum image transfer rate: QSXGA (2592 x 1944): 15 fps1080p: 30 fps960p: 45 fps720p: 60 fpsVGA (640 x 480): 90 fpsQVGA (320 x 240): 120 fps sensitivity: TBD shutter: rolling shutter / global shutter maximum exposure interval: 1968 x tROW pixel size: m x m well capacity: TBD dark current: TBD fixed pattern noise (FPN): TBD image area: m x m die dimensions: 5520 m x 4700 m color CMOS QSXGA (5 megapixel) image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION SPECIFICATION proprietary to OmniVision Technologiesv00table of contents1 signal descriptions 1-12 system level description overview architecture format and frame rate I/O control system clock control power up sequence power up with internal DVDD power up with external DVDD source reset standby and sleep 2-53 block level description pixel array structure binning analog amplifier 10-bit A/D converters 3-24 image sensor core digital functions mirror and flip image windowing test pattern color bar square random data transparent effect rolling bar effect 50/60Hz detection AEC and AGC algorithms

5 Overview average-based algorithm average luminance (YAVG) AEC/AGC steps auto exposure control (AEC) 4-12 color CMOS QSXGA (5 megapixel) image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version LAEC banding mode ON with AEC night mode auto gain control (AGC) black level calibration (BLC) strobe flash and frame exposure strobe flash control xenon flash control LED1 & 2 mode LED 3 mode frame exposure (FREX) mode FREX control FREX strobe flash control one-time programmable (OTP) memory 4-195 image sensor processor digital functions ISP general controls lens correction (LENC) defect pixel cancellation (DPC) auto white balance (AWB) post binning function 5-86 image sensor output interface digital functions system control SCCB group register write timing control strobe frame control (FC) digital video port (DVP) DVP timing mobile industry processor interface (MIPI) 6-147 register tables 7-18 operating specifications absolute maximum ratings functional temperature DC characteristics 8-2 SPECIFICATION proprietary to OmniVision AC characteristics 8-39 mechanical specifications physical specifications 9-110 optical specifications sensor array center lens chief ray angle (CRA) 10-2 color CMOS QSXGA (5 megapixel)

6 Image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version SPECIFICATION proprietary to OmniVision Technologiesix00list of figuresfigure 1-1pad diagram 1-4figure 2-1OV5647 block diagram 2-1figure 2-2reference design schematic 2-2figure 2-3power up timing with internal DVDD 2-4figure 2-4power up timing with external DVDD source 2-5figure 3-1sensor array region color filter layout 3-1figure 3-2example of 2x2 binning 3-2figure 4-1mirror and flip samples 4-1figure 4-2image windowing 4-2figure 4-3color bar types 4-3figure 4-4color, black and white square bars 4-3figure 4-5transparent effect 4-4figure 4-6rolling bar effect 4-4figure 4-7desired convergence 4-8figure 4-8average-based window definition 4-10figure 4-9xenon flash mode 4-14figure 4-10 LED 1 & 2 mode - one pulse output 4-15figure 4-11 LED 1 & 2 mode - multiple pulse output 4-16figure 4-12 LED 3 mode 4-16figure 4-13 FREX modes 4-17figure 6-1 DVP timing diagram 6-12figure 9-1die specifications 9-1figure 10-1sensor array center 10-1figure 10-2chief ray angle (CRA) 10-2 color CMOS QSXGA (5 megapixel)

7 Image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version SPECIFICATION proprietary to OmniVision Technologiesxi00list of tablestable 1-1 signal descriptions1-1table 1-2 pad configuration under various conditions1-3table 2-1 format and frame rate2-3table 3-1 horizontal and vertical binning registers3-2table 4-1 mirror flip control registers4-1table 4-2 image windowing registers4-2table 4-3 test pattern registers4-5table 4-4 50/60 Hz detection control registers4-6table 4-5 AEC/AGC control function registers4-7table 4-6 average based control function registers4-9table 4-7 average luminance control function registers4-10table 4-8 BLC control functions4-13table 4-9 flashlight modes4-14table 4-10 FREX strobe control functions4-18table 4-11 OTP control function registers4-19table 5-1 ISP general control registers5-1table 5-2 LENC control registers5-4table 5-3 defect pixel cancellation registers5-6table 5-4 AWB control registers5-6table 5-5 post binning control registers5-8table 6-1 system control registers6-1table 6-2 system control registers6-5table 6-3 group hold control registers6-6table 6-4 timing control registers6-7table 6-5 strobe control registers6-8table 6-6 frame control registers6-10table 6-7 system control registers6-10table 6-8 DVP timing specifications6-12table 6-9 MIPI transmitter registers6-14table 7-1 system control registers7-1table 7-2 SCCB registers7-5table 7-3 group hold control registers7-7 color CMOS QSXGA (5 megapixel)

8 Image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version 7-4 AEC/AGC 1 registers7-8table 7-5 system timing registers7-8table 7-6 AEC/AGC 2 registers7-11table 7-7 STROBE/frame exposure control registers7-13table 7-8 50/60 HZ detection registers7-15table 7-9 OTP control registers7-16table 7-10 BLC registers7-18table 7-11 frame control registers7-21table 7-12 DVP registers7-21table 7-13 MIPI top registers7-23table 7-14 ISPFC registers7-33table 7-15 ISP TOP control registers7-34table 7-16 AWB registers7-39table 7-17 average registers7-41table 7-18 DPC registers7-42table 7-19 LENC registers7-43table 7-20 cluster DPC registers7-46table 7-21 windows registers7-47table 7-22 AEC/AGC 3 registers7-48table 8-1 absolute maximum ratings8-1table 8-2 functional temperature8-1table 8-3 DC characteristics (-30 C < TA < 70 C)8-2table 8-4 AC characteristics (TA = 25 C, VDD-A = )8-3table 8-5 timing characteristics8-3table 9-1 pad location coordinates9-1table 10-1 CRA versus image height plot10-2 SPECIFICATION proprietary to OmniVision Technologies1-11signal descriptionstable 1-1 lists the signal descriptions and their corresponding pad numbers for the OV5647 image sensor.

9 The die information is shown in section 1-1signal descriptions (sheet 1 of 2)pad numbersignal namepad typedescription1 AVDD powerpower for analog circuit, for analog circuit3 DOGND powerground for digital I/O4 SCLinputSCCB clock input5 SDAI/OSCCB data I/O6 DVDD powerpower for digital core circuit, (connect to capacitor to ground)7 SGND powerground for pixel array8 GPIO1I/OGPIO 19 GPIO0I/OGPIO 010 STROBEI/Ostrobe output11 FREXI/Oframe exposure control12 DOVDD powerpower for digital I/O, ~ analog circuit(connect to capacitor to ground)14 VREF1referencereference for analog circuit(connect to capacitor to ground)15 PWDN inputpower down control(active high with internal pull-down resistor)16 DVDD powerpower for digital core circuit, (connect to capacitor to ground)17 RESETB inputhardware reset (active low with internal pull-up resistor)18 AVDD powerpower for analog circuit, for analog circuit20 TMinputtest mode (active high with internal pull down resistor)21 DOGND powerground for digital I/O22 DVDD powerpower for digital core circuit, (connect to capacitor to ground) color CMOS QSXGA (5 megapixel) image sensor with OmniBSI technologyOV5647proprietary to OmniVision TechnologiesPRELIMINARY SPECIFICATION version for digital core circuit, (connect to capacitor to ground)

10 24 DOVDD powerpower for digital I/O, ~ for digital I/O26 AVDD powerpower for analog circuit, HREF output28 PCLKI/ODVP PCLK output29 VSYNCI/ODVP VSYNC output30 DOVDD powerpower for digital I/O, ~ data bit 032D1I/ODVP data bit 133D2I/ODVP data bit 234D3I/ODVP data bit 335D9/MDN0I/ODVP data bit 9/ MIPI data lane0 negative output36D8/MDP0I/ODVP data bit 8/ MIPI data lane0 positive output37 EVDD powerpower for MIPI circuit, (connect to DVDD)38D7/MCNI/ODVP data bit 7/ MIPI clock negative output39D6/MCPI/ODVP data bit 6/ MIPI clock positive output40 EGND powerground for MIPI TX circuit41D5/MDN1I/ODVP data bit 5/ MIPI data lane1 negative output42D4/MDP1I/ODVP data bit 4/ MIPI data lane1 positive output43 EGND powerground for MIPI TX circuit44 PVDD powerpower for PLL circuit, (connect to AVDD)45 XCLK inputsystem input clock46 DO