HEF4051B 2. Features and benefits

1 HEF4051B8-channel analog multiplexer/demultiplexerRev. 13 29 July 2021 Product data sheet1. General descriptionThe HEF4051B is a single-pole octal-throw analog switch (SP8T) suitable for use in analog ordigital 8:1 multiplexer/demultiplexer applications. The switch Features three digital select inputs(S1, S2 and S3), eight independent inputs/outputs (Yn), a common input/output (Z) and a digitalenable input (E). When E is HIGH, the switches are turned off. Inputs include clamp diodes. Thisenables the use of current limiting resistors to interface inputs to voltages in excess of Features and benefits Wide supply voltage range from V to V CMOS low power dissipation High noise immunity Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Complies with JEDEC standard JESD 13-B ESD protection: HBM JESD22-A114F exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V Specified from -40 C to +85 C and -40 C to +125 C3.

2 Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating4. Ordering informationTable 1. Ordering informationAll types operate from -40 C to +125 numberNameDescriptionVersionHEF4051 BTSO16plastic small outline package; 16 leads; body width mmSOT109-1 HEF4051 BTTTSSOP16plastic thin shrink small outline package; 16 leads; body width mmSOT403-1 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer5. Functional diagram001aac277 LOGIC LEVEL CONVERSION1116 VDD13Y0S11 - OF - 8 DECODER14Y115Y212Y31Y45Y52Y64Y73Z10S29S3 687 VSSVEEEFig. diagram001aac281 YnZVEEVDDVDDFig. diagram (one switch)HEF4051 BAll information provided in this document is subject to legal disclaimers.

3 Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20212 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer001aac27813Y014 11Y1S110S29S36E15Y212Y31Y45Y5Z32Y64Y7 Fig. symbol31 MUX/DMUX13EN1415123152401234567001aac279 X07111096 Fig. logic symbolHEF4051 BAll information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20213 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer001aac280Y0Y1Y2 Y3Y4Y5Y6Y7 ZLEVEL CONVERTERLEVEL CONVERTERS1 LEVEL CONVERTERS2 LEVEL CONVERTERS3 EFig. diagramHEF4051 BAll information provided in this document is subject to legal disclaimers.

4 Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20214 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer6. Pinning PinningHEF4051BY4 VDDY6Y2ZY1Y7Y0Y5Y3ES1 VEES2 VSSS3001aac28212345678109121114131615 Fig. configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16) Pin descriptionTable 2. Pin descriptionSymbolPinDescriptionE6enable input (active LOW)VEE7supply voltageVSS8ground supply voltageS1, S2, S311, 10, 9select inputY0, Y1, Y2, Y3, Y4, Y5, Y6, Y713, 14, 15, 12, 1, 5, 2, 4independent input or outputZ3common output or inputVDD16supply voltage7. Functional descriptionTable 3. Function tableH = HIGH voltage level; L = LOW voltage level; X = don t ONLLLLY0 to ZLLLHY1 to ZLLHLY2 to ZLLHHY3 to ZLHLLY4 to ZLHLHY5 to ZLHHLY6 to ZLHHHY7 to ZHXXX switches offHEF4051 BAll information provided in this document is subject to legal disclaimers.

5 Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20215 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer8. Limiting valuesTable 4. Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).SymbolParameterConditionsMinMax UnitVDDsupply +18 VVEE supply voltagereferenced to VDD[1]-18+ clamping currentpins Sn and E;VI < V or VI > VDD + V- 10mAVIinput + current- 10mAIDD supply current-50mATstgstorage temperature-65+150 CTambambient temperature-40+125 CPtottotal power dissipationTamb = -40 C to +125 C[2]-500mWPpower dissipationper output-100mW[1]To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectionalswitch must not exceed V.

6 If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this casethere is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE.[2]For SOT109-1 (SO16) package: Ptot derates linearly with mW/K above 110 SOT403-1 (TSSOP16) package: Ptot derates linearly with mW/K above 91 Recommended operating conditionsTable 5. Recommended operating conditionsSymbolParameterConditionsMinTy pMaxUnitVDDsupply voltagesee Fig. 73-15 VVIinput voltage0-VDDVT ambambient temperaturein free air-40-+125 CVDD = 5 s/VVDD = 10 s/V t/ Vinput transition rise and fall rateVDD = 15 s/VVDD - VEE (V)015510001aac28510515 VDD - VSS (V)0operating areaFig.

7 Area as a function of the supply voltagesHEF4051 BAll information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20216 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer10. Static characteristicsTable 6. Static characteristicsVSS = VEE = 0 V; VI = VSS or VDD unless otherwise = -40 CTamb = 25 CTamb = 85 CTamb = 125 CSymbolParameterConditionsVDDMinMaxMinMa xMinMaxMinMaxUnit5 voltage|IO| < 1 A15 voltage|IO| < 1 A15 leakagecurrent15 V- AZ port;all channels OFF;see Fig. 815 V---1000----nAIS(OFF)OFF-stateleakagecur rentY port;per channel;see Fig. 915 V---200----nA5 V-5-5-150-150 A10 V-10-10-300-300 AIDD supply currentIO = 0 A15 V-20-20-600-600 ACIinputcapacitanceSn, E Test circuitsIS001aak513 VDDVIVSS = VEES1 to S3 EZVDD or VSSVDDYnVOFig.

8 Circuit for measuring OFF-state leakagecurrent Z portIS001aak514 VSSVO switchVSS = VEES1 to S3 EZY0 VDD or VSSVDDYn12 VIFig. circuit for measuring OFF-state leakagecurrent Yn portHEF4051 BAll information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20217 / 18 NexperiaHEF4051B8-channel analog ON resistanceTable 7. ON resistanceTamb = 25 C; ISW = 200 A; VSS = VEE = 0 - VEETypMaxUnit5 V3502500 10 V80245 RON(peak)ON resistance (peak)VI = 0 V to VDD - VEE;see Fig. 10 and Fig. 1115 V60175 5 V115340 10 V50160 VI = 0 V;see Fig. 10 and Fig. 1115 V40115 5 V120365 10 V65200 RON(rail)ON resistance (rail)VI = VDD - VEE;see Fig.

9 10 and Fig. 1115 V50155 5 V25- 10 V10- RONON resistance mismatchbetween channelsVI = 0 V to VDD - VEE;see Fig. 1015 V5- ON resistance waveform and test circuitV001aak512 VSSVIVSWISWVSS = VEES1 to S3 EZVDD or VSSVDDYnRON = VSW / circuit for measuring RONVI (V)015510001aae648200300100400 RON ( )0 VDD = 5 V10 V15 VFig. 11. Typical RON as a function of input voltageHEF4051 BAll information provided in this document is subject to legal disclaimers. Nexperia 2021. All rights reservedProduct data sheetRev. 13 29 July 20218 / 18 NexperiaHEF4051B8-channel analog multiplexer/demultiplexer11. Dynamic characteristicsTable 8. Dynamic characteristicsTamb = 25 C; VSS = VEE = 0 V; for test circuit see Fig.

10 V1530ns10 V510nsYn, Z to Z, Yn; see Fig. 1215 V510ns5 V150300ns10 V60120nstPHLHIGH to LOW propagation delaySn to Yn, Z; see Fig. 1315 V4590ns5 V1530ns10 V510nsYn, Z to Z, Yn; see Fig. 1215 V510ns5 V150300ns10 V65130nstPLHLOW to HIGH propagation delaySn to Yn, Z; see Fig. 1315 V4590ns5 V120240ns10 V90180nstPHZHIGH to OFF-state propagationdelayE to Yn, Z; see Fig. 1415 V85170ns5 V140280ns10 V55110nstPZHOFF-state to HIGH propagationdelayE to Yn, Z; see Fig. 1415 V4080ns5 V145290ns10 V120240nstPLZLOW to OFF-state propagationdelayE to Yn, Z; see Fig. 1415 V115230ns5 V140280ns10 V55110nstPZLOFF-state to LOW propagationdelayE to Yn, Z; see Fig. 1415 V4080nsHEF4051 BAll information provided in this document is subject to legal disclaimers.